[dv] Prepare CS registers TB for CI

- Switch from Makefile calling fusesoc to fusesoc calling Makefile
- Pass parameters through DPI rather than as env variables

Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>

dv/cs_registers/Makefile

@@ -22,14 +22,6 @@ LDFLAGS  = -shared
 
 CC       = $(CXX)
 
-# Reg TB specific parameters / defines
-PMP_ENABLE = 1
-PMP_NUM_REGIONS = 4
-PMP_GRANULARITY = 0
-
-CFLAGS += -DPMP_ENABLE=$(PMP_ENABLE) -DPMP_NUM_REGIONS=$(PMP_NUM_REGIONS)
-CFLAGS += -DPMP_GRANULARITY=$(PMP_GRANULARITY)
-
 # Add svdpi include
 TOOLDIR = $(subst bin/$(TOOL),,$(shell which $(TOOL)))
 ifeq ($(TOOL),vcs)
@@ -43,9 +35,7 @@ endif
 all: build
 
 build: $(BINDIR)/$(SO_NAME)
-	fusesoc --cores-root=../../ run --setup --build --target=sim --tool=$(TOOL) \
-      lowrisc:ibex:tb_cs_registers --PMPEnable \
-      --PMPNumRegions=$(PMP_NUM_REGIONS) --PMPGranularity=$(PMP_GRANULARITY)
+	@echo "Build done"
 
 $(BINDIR)/$(SO_NAME): buildrepo $(OBJS)
 	@mkdir -p `dirname $@`

dv/cs_registers/README.md

@@ -8,19 +8,15 @@ It is a work in progress and only tests a handful of registers, and is missing m
 How to build and run the testbench
 ----------------------------------
 
-(from this directory)
-
 Verilator version:
 
    ```sh
-   make TOOL=verilator
-   ./build/lowrisc_ibex_tb_cs_registers_0/sim-verilator/Vtb_cs_registers
+   fusesoc --cores-root=. run --target=sim --tool=verilator lowrisc:ibex:tb_cs_registers
    ```
 VCS version:
 
    ```sh
-   make TOOL=vcs
-   ./build/lowrisc_ibex_tb_cs_registers_0/sim-vcs/lowrisc_ibex_tb_cs_registers_0
+   fusesoc --cores-root=. run --target=sim --tool=vcs lowrisc:ibex:tb_cs_registers
    ```
 
 Testbench file structure

dv/cs_registers/env/env_dpi.cc

@@ -3,6 +3,7 @@
 // SPDX-License-Identifier: Apache-2.0
 
 #include "register_environment.h"
+#include "register_types.h"
 
 #include "svdpi.h"
 
@@ -15,9 +16,15 @@ extern "C" {
 
 RegisterEnvironment *reg_env;
 
-void env_initial(svBitVecVal *seed) {
+void env_initial(svBitVecVal *seed, svBit PMPEnable,
+                 svBitVecVal *PMPGranularity, svBitVecVal *PMPNumRegions) {
+  // Package up parameters
+  CSRParams params;
+  params.PMPEnable = PMPEnable;
+  params.PMPGranularity = *PMPGranularity;
+  params.PMPNumRegions = *PMPNumRegions;
   // Create TB environment
-  reg_env = new RegisterEnvironment();
+  reg_env = new RegisterEnvironment(params);
 
   // Initial setup
   reg_env->OnInitial(*seed);

dv/cs_registers/env/env_dpi.sv

@@ -5,7 +5,10 @@
 package env_dpi;
 
   import "DPI-C"
-  function void env_initial(input bit [31:0] seed);
+  function void env_initial(input bit [31:0] seed,
+                            input bit        PMPEnable,
+                            input bit [31:0] PMPGranularity,
+                            input bit [31:0] PMPNumRegions);
 
   import "DPI-C"
   function void env_final();

dv/cs_registers/env/register_environment.cc

@@ -4,9 +4,10 @@
 
 #include "register_environment.h"
 
-RegisterEnvironment::RegisterEnvironment()
-    : simctrl_(new SimCtrl()),
-      reg_model_(new RegisterModel(simctrl_)),
+RegisterEnvironment::RegisterEnvironment(CSRParams params)
+    : params_(params),
+      simctrl_(new SimCtrl()),
+      reg_model_(new RegisterModel(simctrl_, &params_)),
       reg_driver_(new RegisterDriver("reg_driver", reg_model_, simctrl_)),
       rst_driver_(new ResetDriver("rstn_driver")) {}
 

dv/cs_registers/env/register_environment.h

@@ -7,6 +7,7 @@
 
 #include "register_driver.h"
 #include "register_model.h"
+#include "register_types.h"
 #include "reset_driver.h"
 #include "simctrl.h"
 
@@ -15,7 +16,7 @@
  */
 class RegisterEnvironment {
  public:
-  RegisterEnvironment();
+  RegisterEnvironment(CSRParams params);
 
   void OnInitial(unsigned int seed);
   void OnFinal();
@@ -23,6 +24,7 @@ class RegisterEnvironment {
   void GetStopReq(unsigned char *stop_req);
 
  private:
+  CSRParams params_;
   SimCtrl *simctrl_;
   RegisterModel *reg_model_;
   RegisterDriver *reg_driver_;

dv/cs_registers/env/register_types.h

@@ -0,0 +1,14 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef REGISTER_TYPES_H_
+#define REGISTER_TYPES_H_
+
+struct CSRParams {
+  bool PMPEnable;
+  unsigned int PMPGranularity;
+  unsigned int PMPNumRegions;
+};
+
+#endif  // REGISTER_TYPES_H_

dv/cs_registers/model/register_model.cc

@@ -6,11 +6,11 @@
 
 #include <iostream>
 
-RegisterModel::RegisterModel(SimCtrl *sc) : simctrl_(sc) {
+RegisterModel::RegisterModel(SimCtrl *sc, CSRParams *params) : simctrl_(sc) {
   // Instantiate all the registers
-  for (int i = 0; i < 4; i++) {
+  for (unsigned int i = 0; i < 4; i++) {
     uint32_t reg_addr = 0x3A0 + i;
-    if (PMP_ENABLE && (i < (PMP_NUM_REGIONS / 4))) {
+    if (params->PMPEnable && (i < (params->PMPNumRegions / 4))) {
       register_map_.push_back(
           std::make_unique<PmpCfgRegister>(reg_addr, &register_map_));
     } else {
@@ -18,9 +18,9 @@ RegisterModel::RegisterModel(SimCtrl *sc) : simctrl_(sc) {
           std::make_unique<NonImpRegister>(reg_addr, &register_map_));
     }
   }
-  for (int i = 0; i < 16; i++) {
+  for (unsigned int i = 0; i < 16; i++) {
     uint32_t reg_addr = 0x3B0 + i;
-    if (PMP_ENABLE && (i < PMP_NUM_REGIONS)) {
+    if (params->PMPEnable && (i < params->PMPNumRegions)) {
       register_map_.push_back(
           std::make_unique<PmpAddrRegister>(reg_addr, &register_map_));
     } else {

dv/cs_registers/model/register_model.h

@@ -11,6 +11,7 @@
 
 #include "base_register.h"
 #include "register_transaction.h"
+#include "register_types.h"
 #include "simctrl.h"
 
 /**
@@ -18,7 +19,7 @@
  */
 class RegisterModel {
  public:
-  RegisterModel(SimCtrl *sc);
+  RegisterModel(SimCtrl *sc, CSRParams *params);
 
   void NewTransaction(std::unique_ptr<RegisterTransaction> trans);
   void RegisterReset();

dv/cs_registers/tb/tb_cs_registers.cc

@@ -26,8 +26,10 @@ int main(int argc, char **argv) {
   // Setup the simulation
   retcode = simctrl->SetupSimulation(argc, argv);
 
-  // Run the simulation
-  simctrl->RunSimulation();
+  if (!retcode) {
+    // Run the simulation
+    simctrl->RunSimulation();
+  }
 
   delete top;
   delete simctrl;

dv/cs_registers/tb/tb_cs_registers.sv

@@ -132,7 +132,7 @@ module tb_cs_registers #(
     if (!$value$plusargs ("ntb_random_seed=%d", seed)) begin
       seed = 32'd0;
     end
-    env_dpi::env_initial(seed);
+    env_dpi::env_initial(seed,PMPEnable,PMPGranularity,PMPNumRegions);
   end
 
   final begin

dv/cs_registers/tb_cs_registers.core

@@ -6,6 +6,30 @@ CAPI=2:
 name: "lowrisc:ibex:tb_cs_registers"
 description: "CS registers testbench"
 filesets:
+  files_so:
+    files:
+      - Makefile
+      - rst_driver/rst_dpi.cc
+      - rst_driver/reset_driver.cc
+      - rst_driver/reset_driver.h
+      - reg_driver/csr_listing.def
+      - reg_driver/reg_dpi.cc
+      - reg_driver/register_driver.cc
+      - reg_driver/register_driver.h
+      - reg_driver/register_transaction.cc
+      - reg_driver/register_transaction.h
+      - env/env_dpi.cc
+      - env/register_environment.cc
+      - env/register_environment.h
+      - env/simctrl.cc
+      - env/simctrl.h
+      - env/register_types.h
+      - model/base_register.cc
+      - model/base_register.h
+      - model/register_model.cc
+      - model/register_model.h
+    file_type: user
+
   files_sim_verilator:
     depend:
       - lowrisc:dv_verilator:simutil_verilator
@@ -22,6 +46,17 @@ filesets:
       - tb/tb_cs_registers.sv
     file_type: systemVerilogSource
 
+# Call make to build C++ shared object (workaround until natively supported by
+# fusesoc) see olofk/fusesoc#311
+scripts:
+  build_so:
+    filesets:
+      - files_so
+    cmd:
+      - make
+      - -C
+      - ../src/lowrisc_ibex_tb_cs_registers_0
+
 parameters:
   PMPEnable:
     datatype: bool
@@ -46,6 +81,9 @@ targets:
     filesets:
       - files_sim
       - files_sim_verilator
+    hooks:
+      pre_build:
+        - build_so
     parameters:
       - PMPEnable
       - PMPNumRegions
@@ -54,13 +92,13 @@ targets:
     tools:
       vcs:
         vcs_options:
-          - '${PWD}/build/bin/reg_dpi.so'
+          - '../src/lowrisc_ibex_tb_cs_registers_0/build/bin/reg_dpi.so'
           - '-debug_access+all'
 
       verilator:
         mode: cc
         libs:
-          - '${PWD}/../../../build/bin/reg_dpi.so'
+          - '../src/lowrisc_ibex_tb_cs_registers_0/build/bin/reg_dpi.so'
         verilator_options:
           # Disabling tracing reduces compile times but doesn't have a
           # huge influence on runtime performance.