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[DV] streamline Makefile gen flow (#488)

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Signed-off-by: Udi <udij@google.com>
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udinator 2019-11-21 16:51:41 -08:00 • committed by GitHub
parent 1040d5e7e9
commit 1a2270ce40
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1 changed files with 3 additions and 7 deletions
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10
dv/uvm/Makefile
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@ -75,8 +75,7 @@ RISCV_DV_OPTS=--custom_target=${DV_DIR}/riscv_dv_extension \
# Generate random instructions
.SILENT gen:
mkdir -p ${OUT}
cd ${GEN_DIR}; \
python3 ./run.py \
python3 ${GEN_DIR}/run.py \
--output=${OUT}/instr_gen ${GEN_OPTS} \
--steps=gen \
--gen_timeout=${TIMEOUT} \
@ -90,8 +89,7 @@ RISCV_DV_OPTS=--custom_target=${DV_DIR}/riscv_dv_extension \
# Compile the generated assmebly programs to ELF/BIN
gcc_compile:
cd ${GEN_DIR}; \
python3 ./run.py \
python3 ${GEN_DIR}/run.py \
--o=${OUT}/instr_gen ${GEN_OPTS} \
--steps=gcc_compile \
${COMMON_OPTS} \
@ -100,10 +98,8 @@ gcc_compile:
# ISS simulation
iss_sim:
cd ${GEN_DIR}; \
python3 ./run.py \
python3 ${GEN_DIR}/run.py \
--o=${OUT}/instr_gen ${GEN_OPTS} \
--riscv_dv_root=${GEN_DIR} \
--steps=iss_sim \
${COMMON_OPTS} \
--iss=${ISS} \