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Fix some issues and cleanup

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This commit is contained in:
Markus Wegmann 2016-12-30 00:26:15 +01:00
parent caa470303e
commit 346d14c5c8
4 changed files with 28 additions and 21 deletions
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2
.gitignore vendored
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@ -1 +1,3 @@
*.swp
include/riscv_config.sv.bak

30
include/riscv_config.sv
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@ -44,46 +44,46 @@
// CONFIG: MUL_SUPPORT
// will enable RISCV32M support for multiplication, division, MAC operations. Uses a lot of multiplications
//`define MUL_SUPPORT
`define MUL_SUPPORT
// CONFIG: VEC_SUPPORT
// will enable RISCV32V support for vector operations.
//`define VEC_SUPPORT
`define VEC_SUPPORT
// CONFIG: HWLP_SUPPORT
// will enable hardware loop support.
//`define HWLP_SUPPORT
`define HWLP_SUPPORT
// CONFIG: BIT_SUPPORT
// will enable bit manipulation and counting support.
//`define BIT_SUPPORT
`define BIT_SUPPORT
// CONFIG: MATH_SPECIAL_SUPPORT
// will enable clip, min and max operations support.
`define MATH_SPECIAL_SUPPORT
// CONFIG: JUMP_IN_ID_SUPPORT
// will enable jump capability in ID stage.
//`define JUMP_IN_ID_SUPPORT
`define JUMP_IN_ID_SUPPORT
// CONFIG: LSU_ADDER_SUPPORT
// will enable an additional adder in the LSU for better timings.
//`define LSU_ADDER_SUPPORT
`define LSU_ADDER_SUPPORT
`ifdef LSU_ADDER_SUPPORT
// CONFIG: PREPOST_SUPPORT
// will enable pre/post increment load/store support support.
//`define PREPOST_SUPPORT
`define PREPOST_SUPPORT
`endif // LSU_ADDER_SUPPORT
// CONFIG: MATH_SPECIAL_SUPPORT
// will enable clip, min and max operations support.
//`define MATH_SPECIAL_SUPPORT
// Dependent definitions
// CONFIG: THREE_PORT_REG_FILE
// enables 3r2w reg file (rather than 2r1w)
//`define THREE_PORT_REG_FILE
`define THREE_PORT_REG_FILE
`ifndef MUL_SUPPORT
@ -95,15 +95,15 @@
// CONFIG: SIMPLE_ALU
// will enable simplified ALU for less gates. It does not support vectors, shuffling, nor bit operations.
`define SIMPLE_ALU
//`define SIMPLE_ALU
// CONFIG: SMALL_IF
// will disable large FIFO in IF stage and use a more simple one.
`define SMALL_IF
//`define SMALL_IF
// CONFIG: RV32E
// will reduce the register file to 16 words
`define RV32E
//`define RV32E
`endif
`endif

2
scripts/.gitignore vendored
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@ -1,2 +1,4 @@
build/
.idea/
synthesis_results/
gmon.out

15
scripts/ri5cly-manage.py
View file

@ -71,9 +71,10 @@ def main():
if args.synthesize == True:
synthesize(littleRISCV_path)
report(littleRISCV_path)
action_taken = True
if args.report == True:
elif args.report == True:
report(littleRISCV_path)
action_taken = True
@ -284,7 +285,7 @@ def report(littleRISCV_path):
print("Config\t\tArea")
area = os.popen("cat " + os.path.abspath(littleRISCV_path + "/scripts/synthesis_results/custom/reports/imperio_*_area* | grep 'pulpino_i/core_region_i/RISCV_CORE' ")).read()
area_pattern = re.compile("^pulpino_i/core_region_i/RISCV_CORE\s+(\d*)\s+.*$")
area_pattern = re.compile("pulpino_i/core_region_i/RISCV_CORE\s*(\d+\.?\d*)\s*.*")
m = area_pattern.match(area)
area = m.group(1)
area = float(area)
@ -295,15 +296,17 @@ def report(littleRISCV_path):
def reportAll(littleRISCV_path):
print("Config\t\tArea")
for filename in os.listdir(os.path.abspath(littleRISCV_path + "/scripts/example_configs")):
area = os.popen("cat " + os.path.abspath(littleRISCV_path + "/scripts/synthesis_results/" + filename + "/reports/imperio_*_area* | grep 'pulpino_i/core_region_i/RISCV_CORE' ")).read()
area_pattern = re.compile("^pulpino_i/core_region_i/RISCV_CORE\s+(\d*)\s+.*$")
for filename in os.listdir(os.path.abspath(littleRISCV_path + "/scripts/synthesis_results")):
process = os.popen("cat " + os.path.abspath(littleRISCV_path + "/scripts/synthesis_results/" + filename + "/reports/imperio_*_area* | grep 'pulpino_i/core_region_i/RISCV_CORE' "))
area = process.read()
process.close()
area_pattern = re.compile("pulpino_i/core_region_i/RISCV_CORE\s*(\d+\.?\d*)\s*.*")
m = area_pattern.match(area)
area = m.group(1)
area = float(area)
area /= 1.44 * 1000.0
print("{}\t\t\t\t\t\t\t{}".format(filename,area))
print("{}\t\t{}".format(filename,area))