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[doc] Fix spelling of CoreMark
Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
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5 changed files with 24 additions and 24 deletions
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@ -23,15 +23,15 @@ These are configurations on which lowRISC is focusing for performance evaluation
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| Config | "small" | "maxperf" | "maxperf-pmp-bmfull" |
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| ------ | ------- | --------- | ---------------- |
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| Features | RV32IMC, 3 cycle mult | RV32IMC, 1 cycle mult, Branch target ALU, Writeback stage | RV32IMCB, 1 cycle mult, Branch target ALU, Writeback stage, 16 PMP regions |
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| Performance (Coremark/MHz) | 2.44 | 3.09 | 3.09 |
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| Performance (CoreMark/MHz) | 2.44 | 3.09 | 3.09 |
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| Area - Yosys (kGE) | 33.15 | 39.03 | 63.32 |
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| Area - Commercial (estimated kGE) | ~27 | ~31 | ~50 |
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| Verification status | Green | Amber | Amber |
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Notes:
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* Performance numbers are based on Cormark running on the Ibex Simple System [platform](examples/simple_system/README.md).
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Note that Coremark was compiled without support for the B extension.
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* Performance numbers are based on CoreMark running on the Ibex Simple System [platform](examples/simple_system/README.md).
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Note that CoreMark was compiled without support for the B extension.
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* Yosys synthesis area numbers are based on the Ibex basic synthesis [flow](syn/README.md).
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* Commercial synthesis area numbers are a rough estimate of what might be achievable with a commercial synthesis flow and technology library.
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* Verification status is a rough guide to the overall maturity of a particular configuration.
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@ -16,23 +16,23 @@ fusesoc --cores-root=. run --target=sim --setup --build lowrisc:ibex:ibex_simple
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See examples/simple_system/README.md for full details.
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## Coremark
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## CoreMark
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Coremark (https://www.eembc.org/coremark/ https://github.com/eembc/coremark) is
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CoreMark (https://www.eembc.org/coremark/ https://github.com/eembc/coremark) is
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an industry standard benchmark with results available for a wide variety of
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systems.
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The Coremark source is vendored into the Ibex repository at
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`vendor/eembc_coremark`. Support structure and a makefile to build Coremark for
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The CoreMark source is vendored into the Ibex repository at
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`vendor/eembc_coremark`. Support structure and a makefile to build CoreMark for
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running on simple system is found in `examples/sw/benchmarks/coremark`.
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To build Coremark:
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To build CoreMark:
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```
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make -C ./examples/sw/benchmarks/coremark/
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```
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To run Coremark (after building a suitable simulator binary, see above):
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To run CoreMark (after building a suitable simulator binary, see above):
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```
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build/lowrisc_ibex_ibex_simple_system_0/sim-verilator/Vibex_simple_system --meminit=ram,examples/sw/benchmarks/coremark/coremark.elf
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@ -41,7 +41,7 @@ build/lowrisc_ibex_ibex_simple_system_0/sim-verilator/Vibex_simple_system --memi
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The simulator outputs the performance counter values observed for the benchmark
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(the counts do not include anything from pre or post benchmark loops).
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Coremark should output (to `ibex_simple_system.log`) something like the
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CoreMark should output (to `ibex_simple_system.log`) something like the
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following:
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```
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@ -62,30 +62,30 @@ seedcrc : 0xe9f5
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Correct operation validated. See README.md for run and reporting rules.
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```
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A Coremark score is given as the number of iterations executed per second. The
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Coremark binary is hard-coded to execute 10 iterations (see
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A CoreMark score is given as the number of iterations executed per second. The
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CoreMark binary is hard-coded to execute 10 iterations (see
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`examples/sw/benchmarks/coremark/Makefile` if you wish to alter this). To obtain
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a useful Coremark score from the simulation you need to choose a clock speed the
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a useful CoreMark score from the simulation you need to choose a clock speed the
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Ibex implementation you are interested in would run at, e.g. 100 MHz, taking
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the above example:
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* 10 iterations take 4244465 clock cycles
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* So at 100 MHz Ibex would execute (100 * 10^6) / (4244465 / 10) = 235.6
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Iterations in 1 second.
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* Coremark (at 100 MHz) is 235.6
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* CoreMark (at 100 MHz) is 235.6
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Coremark/MHz is often used instead of a raw Coremark score. The example above
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gives a Coremark/MHz of 2.36 (235.6 / 100 rounded to 2 decimal places).
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CoreMark/MHz is often used instead of a raw CoreMark score. The example above
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gives a CoreMark/MHz of 2.36 (235.6 / 100 rounded to 2 decimal places).
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To directly produce Coremark/MHz from the number of iterations (I) and total
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To directly produce CoreMark/MHz from the number of iterations (I) and total
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ticks (T) use the follow formula:
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```
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Coremark/MHz = (10 ^ 6) * I / T
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CoreMark/MHz = (10 ^ 6) * I / T
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```
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Note that `core_main.c` from Coremark has had a minor modification to prevent it
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Note that `core_main.c` from CoreMark has had a minor modification to prevent it
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from reporting an error if it executes for less than 10 seconds. This violates
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the run reporting rules (though does not effect benchmark execution). It is
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trivial to restore `core_main.c` to the version supplied by EEMBC in the
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Coremark repository if an official result is desired.
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CoreMark repository if an official result is desired.
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@ -160,7 +160,7 @@ ee_u32 default_num_contexts = 1;
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Test for some common mistakes.
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*/
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void portable_init(core_portable *p, int *argc, char *argv[]) {
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ee_printf("Ibex coremark platform init...\n");
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ee_printf("Ibex CoreMark platform init...\n");
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if (sizeof(ee_ptr_int) != sizeof(ee_u8 *)) {
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ee_printf(
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"ERROR! Please define ee_ptr_int to a type that holds a pointer!\n");
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@ -181,7 +181,7 @@ void portable_fini(core_portable *p) {
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coremark_mhz = (1000000.0f * (float)ITERATIONS) / elapsed;
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ee_printf("Coremark / MHz: %f\n", coremark_mhz);
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ee_printf("CoreMark / MHz: %f\n", coremark_mhz);
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p->portable_id = 0;
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}
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@ -76,7 +76,7 @@ extern unsigned int _stack_start;
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*Imprtant* :
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ee_ptr_int needs to be the data type used to hold pointers, otherwise
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coremark may fail!!!
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CoreMark may fail!!!
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*/
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typedef signed short ee_s16;
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typedef unsigned short ee_u16;
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@ -114,7 +114,7 @@ module ibex_core #(
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localparam bit DummyInstructions = SecureIbex;
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// Speculative branch option, trades-off performance against timing.
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// Setting this to 1 eases branch target critical paths significantly but reduces performance
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// by ~3% (based on Coremark/MHz score).
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// by ~3% (based on CoreMark/MHz score).
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// Set by default in the max PMP config which has the tightest budget for branch target timing.
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localparam bit SpecBranch = PMPEnable & (PMPNumRegions == 16);
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