Update code from upstream repository
https://github.com/lowRISC/opentitan to revision
9ac4f9c8b924b79eb7d3581b29346a612f705751

* Allow verilated top-levels to do work after a simulation completes
  (Rupert Swarbrick)
* Add some missing dependencies on lowrisc:prim:assert (Rupert
  Swarbrick)

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
This commit is contained in:
Rupert Swarbrick 2020-07-06 10:13:54 +01:00 committed by Rupert Swarbrick
parent f98ddabee1
commit 45d3790d40
6 changed files with 85 additions and 80 deletions

View file

@ -9,6 +9,6 @@
upstream:
{
url: https://github.com/lowRISC/opentitan
rev: 976d9b9c1f563173d9e4571c775b38e70cb1c5d4
rev: 9ac4f9c8b924b79eb7d3581b29346a612f705751
}
}

View file

@ -36,8 +36,6 @@ void VerilatorSimCtrl::SetTop(VerilatedToplevel *top, CData *sig_clk,
}
int VerilatorSimCtrl::Exec(int argc, char **argv) {
RegisterSignalHandler();
bool exit_app = false;
if (!ParseCommandArgs(argc, argv, exit_app)) {
return 1;
@ -55,7 +53,68 @@ int VerilatorSimCtrl::Exec(int argc, char **argv) {
return 0;
}
bool VerilatorSimCtrl::ParseCommandArgs(int argc, char **argv, bool &exit_app) {
const struct option long_options[] = {
{"term-after-cycles", required_argument, nullptr, 'c'},
{"trace", no_argument, nullptr, 't'},
{"help", no_argument, nullptr, 'h'},
{nullptr, no_argument, nullptr, 0}};
while (1) {
int c = getopt_long(argc, argv, ":c:th", long_options, nullptr);
if (c == -1) {
break;
}
// Disable error reporting by getopt
opterr = 0;
switch (c) {
case 0:
break;
case 't':
if (!tracing_possible_) {
std::cerr << "ERROR: Tracing has not been enabled at compile time."
<< std::endl;
return false;
}
TraceOn();
break;
case 'c':
term_after_cycles_ = atoi(optarg);
break;
case 'h':
PrintHelp();
exit_app = true;
break;
case ':': // missing argument
std::cerr << "ERROR: Missing argument." << std::endl << std::endl;
return false;
case '?':
default:;
// Ignore unrecognized options since they might be consumed by
// Verilator's built-in parsing below.
}
}
// Pass args to verilator
Verilated::commandArgs(argc, argv);
// Parse arguments for all registered extensions
for (auto it = extension_array_.begin(); it != extension_array_.end(); ++it) {
if (!(*it)->ParseCLIArguments(argc, argv, exit_app)) {
return false;
if (exit_app) {
return true;
}
}
}
return true;
}
void VerilatorSimCtrl::RunSimulation() {
RegisterSignalHandler();
// Print helper message for tracing
if (TracingPossible()) {
std::cout << "Tracing can be toggled by sending SIGUSR1 to this process:"
@ -141,65 +200,6 @@ void VerilatorSimCtrl::SignalHandler(int sig) {
}
}
bool VerilatorSimCtrl::ParseCommandArgs(int argc, char **argv, bool &exit_app) {
const struct option long_options[] = {
{"term-after-cycles", required_argument, nullptr, 'c'},
{"trace", no_argument, nullptr, 't'},
{"help", no_argument, nullptr, 'h'},
{nullptr, no_argument, nullptr, 0}};
while (1) {
int c = getopt_long(argc, argv, ":c:th", long_options, nullptr);
if (c == -1) {
break;
}
// Disable error reporting by getopt
opterr = 0;
switch (c) {
case 0:
break;
case 't':
if (!tracing_possible_) {
std::cerr << "ERROR: Tracing has not been enabled at compile time."
<< std::endl;
return false;
}
TraceOn();
break;
case 'c':
term_after_cycles_ = atoi(optarg);
break;
case 'h':
PrintHelp();
exit_app = true;
break;
case ':': // missing argument
std::cerr << "ERROR: Missing argument." << std::endl << std::endl;
return false;
case '?':
default:;
// Ignore unrecognized options since they might be consumed by
// Verilator's built-in parsing below.
}
}
// Pass args to verilator
Verilated::commandArgs(argc, argv);
// Parse arguments for all registered extensions
for (auto it = extension_array_.begin(); it != extension_array_.end(); ++it) {
if (!(*it)->ParseCLIArguments(argc, argv, exit_app)) {
return false;
if (exit_app) {
return true;
}
}
}
return true;
}
void VerilatorSimCtrl::PrintHelp() const {
std::cout << "Execute a simulation model for " << GetName() << "\n\n";
if (tracing_possible_) {

View file

@ -46,23 +46,34 @@ class VerilatorSimCtrl {
* SetTop() must be called before this function.
*
* This function performs the following tasks:
* 1. Sets up a signal handler to enable tracing to be turned on/off during
* a run by sending SIGUSR1 to the process
* 2. Parses a C-style set of command line arguments.
* 3. Runs the simulation
* 1. Parses a C-style set of command line arguments (see ParseCommandArgs())
* 2. Runs the simulation (see RunSimulation())
*
* @return a main()-compatible process exit code: 0 for success, 1 in case
* of an error.
*/
int Exec(int argc, char **argv);
/**
* Parse command line arguments
*
* Process all recognized command-line arguments from argc/argv.
*
* @param argc, argv Standard C command line arguments
* @param exit_app Indicate that program should terminate
* @return Return code, true == success
*/
bool ParseCommandArgs(int argc, char **argv, bool &exit_app);
/**
* A helper function to execute a standard set of run commands.
*
* This function performs the following tasks:
* 1. Prints some tracer-related helper messages
* 2. Runs the simulation
* 3. Prints some further helper messages and statistics once the simulation
* 1. Sets up a signal handler to enable tracing to be turned on/off during
* a run by sending SIGUSR1 to the process
* 2. Prints some tracer-related helper messages
* 3. Runs the simulation
* 4. Prints some further helper messages and statistics once the simulation
* has run to completion
*/
void RunSimulation();
@ -137,17 +148,6 @@ class VerilatorSimCtrl {
*/
static void SignalHandler(int sig);
/**
* Parse command line arguments
*
* Process all recognized command-line arguments from argc/argv.
*
* @param argc, argv Standard C command line arguments
* @param exit_app Indicate that program should terminate
* @return Return code, true == success
*/
bool ParseCommandArgs(int argc, char **argv, bool &exit_app);
/**
* Print help how to use this tool
*/

View file

@ -7,6 +7,8 @@ name: "lowrisc:prim_generic:clock_mux2"
description: "two-input clock multiplexer primitive"
filesets:
files_rtl:
depend:
- lowrisc:prim:assert
files:
- rtl/prim_generic_clock_mux2.sv
file_type: systemVerilogSource

View file

@ -7,6 +7,8 @@ name: "lowrisc:prim_generic:pad_wrapper"
description: "Technology-independent pad wrapper implementation (for sim only!)"
filesets:
files_rtl:
depend:
- lowrisc:prim:assert
files:
- rtl/prim_generic_pad_wrapper.sv
file_type: systemVerilogSource

View file

@ -8,6 +8,7 @@ description: "Single port RAM"
filesets:
files_rtl:
depend:
- lowrisc:prim:assert
- lowrisc:prim:util_memload
files:
- rtl/prim_generic_ram_1p.sv