[dv] Add custom CSRs to yaml description file

This is related to lowRISC/ibex#1038.

Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>

dv/uvm/core_ibex/riscv_dv_extension/csr_description.yaml

@@ -295,3 +295,54 @@
       reset_val: 0x1
       msb: 1
       lsb: 0
+
+# CPUCTRL
+- csr: cpuctrl
+  description: >
+    CPU control register (custom)
+  address: 0x7C0
+  privilege_mode: M
+  rv32:
+    - field_name: dumm_instr_mask
+      - description: >
+          Mask to control frequency of dummy instruction insertion
+      - type: WARL
+      - reset_val: 0
+      - msb: 5
+      - lsb: 3
+    - field_name: dummy_instr_en
+      - description: >
+          Enable or disable dummy instruction insertion
+      - type: WARL
+      - reset_val: 0
+      - msb: 2
+      - lsb: 2
+    - field_name: data_ind_timing
+      - description: >
+          Enable or disable data-independent timing features
+      - type: WARL
+      - reset_val: 0
+      - msb: 1
+      - lsb: 1
+    - field_name: icache_enable
+      - description: >
+          Enable or disable the instruction cache
+      - type: WARL
+      - reset_val: 0
+      - msb: 0
+      - lsb: 0
+
+# SECURESEED
+- csr: secureseed
+  description: >
+    CSR for re-seeding security-related pseudo-random number generators (custom)
+  address: 0x7C1
+  privilege_mode: M
+  rv32:
+    - field_name: secureseed
+      - description: >
+          New seed value (write-only), reads always return 0.
+      - type: WARL
+      - reset_val: 0
+      - msb: 31
+      - lsb: 0