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[rtl] Fix jump signal stuck high during stall
- Stalls due to preceding memory accesses in the WB stage shouldn't cause the jump signal to remain high. - The jump signal being stuck high causes repeated memory accesses to the same address, and unnecessary stalling. - Fixes lowRISC/opentitan#2099 Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>
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1 changed files with 5 additions and 1 deletions
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@ -193,6 +193,7 @@ module ibex_id_stage #(
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logic branch_set, branch_set_d;
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logic branch_set, branch_set_d;
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logic branch_taken;
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logic branch_taken;
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logic jump_in_dec;
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logic jump_in_dec;
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logic jump_set_dec;
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logic jump_set;
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logic jump_set;
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logic instr_first_cycle;
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logic instr_first_cycle;
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@ -400,7 +401,7 @@ module ibex_id_stage #(
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.dret_insn_o ( dret_insn_dec ),
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.dret_insn_o ( dret_insn_dec ),
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.ecall_insn_o ( ecall_insn_dec ),
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.ecall_insn_o ( ecall_insn_dec ),
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.wfi_insn_o ( wfi_insn_dec ),
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.wfi_insn_o ( wfi_insn_dec ),
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.jump_set_o ( jump_set ),
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.jump_set_o ( jump_set_dec ),
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.branch_taken_i ( branch_taken ),
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.branch_taken_i ( branch_taken ),
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.icache_inval_o ( icache_inval_o ),
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.icache_inval_o ( icache_inval_o ),
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@ -663,6 +664,7 @@ module ibex_id_stage #(
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// could generate needless prefetch buffer flushes and instruction fetches. ID/EX is designed such
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// could generate needless prefetch buffer flushes and instruction fetches. ID/EX is designed such
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// that this shouldn't ever happen.
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// that this shouldn't ever happen.
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`ASSERT(NeverDoubleBranch, branch_set |=> ~branch_set)
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`ASSERT(NeverDoubleBranch, branch_set |=> ~branch_set)
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`ASSERT(NeverDoubleJump, jump_set |=> ~jump_set)
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///////////////
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///////////////
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// ID-EX FSM //
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// ID-EX FSM //
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@ -692,6 +694,7 @@ module ibex_id_stage #(
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stall_branch = 1'b0;
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stall_branch = 1'b0;
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stall_alu = 1'b0;
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stall_alu = 1'b0;
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branch_set_d = 1'b0;
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branch_set_d = 1'b0;
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jump_set = 1'b0;
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perf_branch_o = 1'b0;
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perf_branch_o = 1'b0;
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if (instr_executing) begin
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if (instr_executing) begin
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@ -733,6 +736,7 @@ module ibex_id_stage #(
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// BTALU means jumps only need one cycle
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// BTALU means jumps only need one cycle
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id_fsm_d = BranchTargetALU ? FIRST_CYCLE : MULTI_CYCLE;
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id_fsm_d = BranchTargetALU ? FIRST_CYCLE : MULTI_CYCLE;
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stall_jump = ~BranchTargetALU;
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stall_jump = ~BranchTargetALU;
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jump_set = jump_set_dec;
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end
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end
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alu_multicycle_dec: begin
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alu_multicycle_dec: begin
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stall_alu = 1'b1;
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stall_alu = 1'b1;
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