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merge [rtl] Ignore MIE bit in U mode

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Greg Chadwick 2022-09-30 17:45:38 +01:00 • committed by davide schiavone
parent 45e97c2265
commit 72c2f3ec4e
1 changed files with 5 additions and 2 deletions
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7
rtl/cve2_controller.sv
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@ -140,7 +140,7 @@ module cve2_controller #(
logic enter_debug_mode;
logic ebreak_into_debug;
logic handle_irq;
logic irq_enabled;
logic [3:0] mfip_id;
logic unused_irq_timer;
@ -291,12 +291,15 @@ module cve2_controller #(
priv_mode_i == PRIV_LVL_U ? debug_ebreaku_i :
1'b0;
// MIE bit only applies when in M mode
assign irq_enabled = csr_mstatus_mie_i | (priv_mode_i == PRIV_LVL_U);
// Interrupts including NMI are ignored,
// - while in debug mode [Debug Spec v0.13.2, p.39],
// - while in NMI mode (nested NMIs are not supported, NMI has highest priority and
// cannot be interrupted by regular interrupts).
// - while single stepping.
assign handle_irq = ~debug_mode_q & ~debug_single_step_i & ~nmi_mode_q &
assign handle_irq = ~debug_mode_q & ~nmi_mode_q &
(irq_nm_i | (irq_pending_i & csr_mstatus_mie_i));
// generate ID of fast interrupts, highest priority to lowest ID