github-mirrors/cve2
1
0
Fork 0
mirror of https://github.com/openhwgroup/cve2.git synced 2025-04-22 04:57:25 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

[simple-system] Add ICache parameters

Browse source 
Simple system fails to build without these when using parameters from
ibex_config.py

Signed-off-by: Greg Chadwick <gac@lowrisc.org>
This commit is contained in:
Greg Chadwick 2020-11-02 12:13:14 +00:00
parent bf2476c15c
commit 8b2e191780
2 changed files with 18 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

14
examples/simple_system/ibex_simple_system.core
View file

@ -51,6 +51,18 @@ parameters:
paramtype: vlogdefine
description: "Register file implementation parameter enum. See the ibex_pkg::regfile_e enum in ibex_pkg.sv for permitted values."
ICache:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable instruction cache"
ICacheECC:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable ECC protection in instruction cache"
SRAMInitFile:
datatype: str
paramtype: vlogparam
@ -110,6 +122,8 @@ targets:
- RV32M
- RV32B
- RegFile
- ICache
- ICacheECC
- BranchTargetALU
- WritebackStage
- SecureIbex

4
examples/simple_system/rtl/ibex_simple_system.sv
View file

@ -45,6 +45,8 @@ module ibex_simple_system (
parameter ibex_pkg::regfile_e RegFile = `RegFile;
parameter bit BranchTargetALU = 1'b0;
parameter bit WritebackStage = 1'b0;
parameter bit ICache = 1'b0;
parameter bit ICacheECC = 1'b0;
parameter bit BranchPredictor = 1'b0;
parameter SRAMInitFile = "";
@ -170,6 +172,8 @@ module ibex_simple_system (
.RV32B ( RV32B ),
.RegFile ( RegFile ),
.BranchTargetALU ( BranchTargetALU ),
.ICache ( ICache ),
.ICacheECC ( ICacheECC ),
.WritebackStage ( WritebackStage ),
.BranchPredictor ( BranchPredictor ),
.DmHaltAddr ( 32'h00100000 ),