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Pass through ICache-related parameters in compliance test

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The RISC-V compliance toplevel needs to pass through the instruction
cache-related parameters, which are set by the ibex configuration
script.
This commit is contained in:
Philipp Wagner 2020-10-27 09:51:36 +00:00 • committed by Philipp Wagner
parent 7558ecc720
commit adb5d0fd27
1 changed files with 4 additions and 0 deletions
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4
dv/riscv_compliance/rtl/ibex_riscv_compliance.sv
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@ -24,6 +24,8 @@ module ibex_riscv_compliance (
parameter ibex_pkg::regfile_e RegFile = ibex_pkg::RegFileFF;
parameter bit BranchTargetALU = 1'b0;
parameter bit WritebackStage = 1'b0;
parameter bit ICache = 1'b0;
parameter bit ICacheECC = 1'b0;
parameter bit BranchPredictor = 1'b0;
logic clk_sys, rst_sys_n;
@ -120,6 +122,8 @@ module ibex_riscv_compliance (
.RegFile (RegFile ),
.BranchTargetALU (BranchTargetALU ),
.WritebackStage (WritebackStage ),
.ICache (ICache ),
.ICacheECC (ICacheECC ),
.BranchPredictor (BranchPredictor ),
.DmHaltAddr (32'h00000000 ),
.DmExceptionAddr (32'h00000000 )