github-mirrors/cve2
1
0
Fork 0
mirror of https://github.com/openhwgroup/cve2.git synced 2025-04-24 22:17:39 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Optimize use of RAM primitive in icache

Browse source 
The RAM primitive provides a way to specify the granularity of the write
mask (wmask) signal, which can be used to select an appropriate
implementation (e.g. a SRAM with only byte selects, or no subselects at
all).
This commit is contained in:
Philipp Wagner 2020-05-22 16:16:09 +01:00 • committed by Philipp Wagner
parent 7e1852024a
commit dd39ec0c91
1 changed files with 6 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

6
rtl/ibex_icache.sv
View file

@ -302,7 +302,8 @@ module ibex_icache #(
// Tag RAM instantiation
prim_ram_1p #(
.Width (TAG_SIZE_ECC),
.Depth (NUM_LINES)
.Depth (NUM_LINES),
.DataBitsPerMask (TAG_SIZE_ECC)
) tag_bank (
.clk_i (clk_i),
.req_i (tag_req_ic0 & tag_banks_ic0[way]),
@ -315,7 +316,8 @@ module ibex_icache #(
// Data RAM instantiation
prim_ram_1p #(
.Width (LINE_SIZE_ECC),
.Depth (NUM_LINES)
.Depth (NUM_LINES),
.DataBitsPerMask (LINE_SIZE_ECC)
) data_bank (
.clk_i (clk_i),
.req_i (data_req_ic0 & data_banks_ic0[way]),