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Remove --riscv-dv-root argument from sim.py

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This is set to what you'd expect in the Makefile and it seems a little
odd anyway: surely we should use the same directory as the code we're
running?
This commit is contained in:
Rupert Swarbrick 2020-03-03 11:39:35 +00:00 • committed by Rupert Swarbrick
parent 04b5cb2d46
commit f9ea35d22b
2 changed files with 4 additions and 7 deletions
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2
dv/uvm/core_ibex/Makefile
View file

@ -318,7 +318,6 @@ $(OUT)/rtl_sim/.compile.stamp: \
$(compile-vars-prereq) $(all-verilog) $(risc-dv-files) | $(OUT)/rtl_sim
@python3 ./sim.py \
--o=${OUT} \
--riscv_dv_root=${GEN_DIR} \
--steps=compile \
${COMMON_OPTS} \
--simulator="${SIMULATOR}" $(cov-arg) $(wave-arg) \
@ -352,7 +351,6 @@ $(metadata)/rtl_sim.run.stamp: \
$(metadata)/rtl_sim.compile.stamp $(metadata)/instr_gen.compile.stamp
@python3 ./sim.py \
--o=$(OUT-SEED) \
--riscv_dv_root=${GEN_DIR} \
--steps=sim \
${TEST_OPTS} \
--simulator="${SIMULATOR}" $(cov-arg) $(wave-arg) \

9
dv/uvm/core_ibex/sim.py
View file

@ -24,13 +24,14 @@ import sys
_CORE_IBEX = os.path.normpath(os.path.join(os.path.dirname(__file__)))
_IBEX_ROOT = os.path.normpath(os.path.join(_CORE_IBEX, '../../..'))
_DV_SCRIPTS = os.path.join(_IBEX_ROOT, 'vendor/google_riscv-dv/scripts')
_RISCV_DV_ROOT = os.path.join(_IBEX_ROOT, 'vendor/google_riscv-dv')
_OLD_SYS_PATH = sys.path
# Import riscv_trace_csv and lib from _DV_SCRIPTS before putting sys.path back
# as it started.
try:
sys.path = ([os.path.join(_CORE_IBEX, 'riscv_dv_extension'), _DV_SCRIPTS] +
sys.path = ([os.path.join(_CORE_IBEX, 'riscv_dv_extension'),
os.path.join(_RISCV_DV_ROOT, 'scripts')] +
sys.path)
from lib import (get_seed, process_regression_list,
@ -292,8 +293,6 @@ def main():
parser.add_argument("--o", type=str, default="out",
help="Output directory name")
parser.add_argument("--riscv_dv_root", type=str, default="",
help="Root directory of RISCV-DV")
parser.add_argument("--testlist", help="Regression testlist",
default=os.path.join(_CORE_IBEX,
'riscv_dv_extension',
@ -358,7 +357,7 @@ def main():
if steps['sim'] or steps['compare']:
process_regression_list(args.testlist, args.test, args.iterations,
matched_list, args.riscv_dv_root)
matched_list, _RISCV_DV_ROOT)
if not matched_list:
sys.exit("Cannot find %s in %s" % (args.test, args.testlist))