mirror of
https://github.com/openhwgroup/cve2.git
synced 2025-04-20 12:08:05 -04:00
Update code from upstream repository https://github.com/google/riscv- dv to revision 0b625258549e733082c12e5dc749f05aefb07d5a * Add a knob to use rounding mode from the instruction (google/riscv- dv#767) (taoliug) * Add rounding mode support for floating point arithmetic instructions (google/riscv-dv#766) (taoliug) * Fix syntax issue (google/riscv-dv#765) (taoliug) * Add riscv_amo_instr (aneels3) * convert string to enum type (ishita71) * Remove unintended errors in the coverage flow (google/riscv-dv#757) (taoliug) * Fix c_test handling in the YAML testlist (google/riscv-dv#756) (taoliug) * Add support for new Spike trace format (google/riscv-dv#755) (Daniel Bates) * Fix google/riscv-dv#751 for floating point coverage (Weicai Yang) * Fix issues with implemented TODO's (aneels3) * fix randomize_gpr (aneels3) * Add file riscv_b_instr.py (ishita71) * add std_randomize todo (pvipsyash) * Add todo for floating_point test (ShraddhaDevaiya) * Add scripts to integrate with Metrics regression platform (Aimee Sutton) Includes a fix to dv/uvm/core_ibex/sim.py to use `asm_test` rather than `asm_tests` due to changes in RISCV-DV Signed-off-by: Greg Chadwick <gac@lowrisc.org> |
||
---|---|---|
.. | ||
source | ||
make.bat | ||
Makefile |