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8d37af2751
Update code from upstream repository https://github.com/google/riscv- dv to revision 59dcd8c813484eb6dcca67e7e36089fe772b9cc8 * Update scripts for Metrics CI regression: bug fixes, change ISS to spike in CI regression (Aimee Sutton) * Add illegal and load store instruction (aneels3) * Avoid generating hint instruction when RV32C is turned off (google/riscv-dv#787) (taoliug) * Fix illegal opcode issue in the cov_test (google/riscv-dv#786) (taoliug) * [questa] Remove -access=rwc from vlog command line arguments (Rupert Swarbrick) * [ci] temporarily disable CI flow (Udi Jonnalagadda) * fix issue with rcs for num_of_harts (aneels3) * fix multi-hart label issue (aneels3) * add multi_hart test (ishita71) * Fix minor issues (aneels3) * Add riscv_signature_pkg (aneels3) * add gen_signature_handshake (ishita71) * Add gen_interrupt_vector_table (aneels3) * Remove the unnecessary lines (Anil Sharma) * fix issue with riscv_rand_instr_test (aneels3) * Add multiprocessing code block (aneels3) Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org> |
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| .. | ||
| base_testlist.yaml | ||
| cov_testlist.yaml | ||
| csr_template.yaml | ||
| iss.yaml | ||
| simulator.yaml | ||