Rupert Swarbrick 2f1e188346 Fix port list in top_artya7 example ... The "alert_major" port was split into "internal" and "bus" parts back in commit 9943f9a. Update the example to match.		2022-03-15 15:37:03 +00:00
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fpga/artya7	Fix port list in top_artya7 example	2022-03-15 15:37:03 +00:00
simple_system	[rtl] Switch to multi-bit fetch enable	2022-02-21 15:35:35 +00:00
sw	[coremark] Add option to coremark build to suppress pcount dump	2021-11-12 09:39:38 +00:00