cve2/vendor
Philipp Wagner f53ee9b09f Update google_riscv-dv to google/riscv-dv@2e52518
Update code from upstream repository https://github.com/google/riscv-
dv to revision 2e5251846efb5fa42882a2b6b571ef8693e8cd60

* Remove f strings for Python 3.5-compatibility (Philipp Wagner)
* Fix start-end pair mismatch in asm file (aneels3)
* Fix AMO instruction constraint issue (google/riscv-dv#682) (taoliug)
* - Adds support for the coverage report visualization (pyucis-viewer)
  - Adds CSR, opcode, rv32i_misc, and mepc_alignment covergroups
  (Hodjat Asghari Esfeden)
* fix Todo of directed_lib (aneels3)
* Added avail_regs_c constraint (ShraddhaDevaiya)
* Fix factory method implementation (aneels3)
* Add directed instr (aneels3)
* fix label issue (aneels3)
* fix randomization issue (aneels3)
* Fix typo (aneels3)
* add riscv_pseudo_instr (aneels3)
* add value_plusargs functionality (pvipsyash)
* add riscv_utils and fix minor issues (aneels3)
* modify for directed scenario (pvipsyash)
* Fix a minor issue with the instruction PC (Hodjat Asghari Esfeden)

Signed-off-by: Philipp Wagner <phw@lowrisc.org>
2020-08-20 18:09:11 +01:00
..
eembc_coremark Update eembc_coremark to eembc/coremark@0c91314 2020-03-09 14:41:40 +00:00
google_riscv-dv Update google_riscv-dv to google/riscv-dv@2e52518 2020-08-20 18:09:11 +01:00
lowrisc_ip Update lowrisc_ip to lowRISC/opentitan@92e92424 2020-08-17 09:18:06 +01:00
patches Update lowrisc_ip to lowRISC/opentitan@92e92424 2020-08-17 09:18:06 +01:00
eembc_coremark.lock.hjson Update eembc_coremark to eembc/coremark@0c91314 2020-03-09 14:41:40 +00:00
google_riscv-dv.lock.hjson Update google_riscv-dv to google/riscv-dv@2e52518 2020-08-20 18:09:11 +01:00
google_riscv-dv.vendor.hjson exclude tar.gz compressed file from vendoring, and remove from vendor directory (#550) 2020-01-09 15:50:34 -08:00
lowrisc_ip.lock.hjson Update lowrisc_ip to lowRISC/opentitan@92e92424 2020-08-17 09:18:06 +01:00
lowrisc_ip.vendor.hjson Update lowrisc_ip to lowRISC/opentitan@92e92424 2020-08-17 09:18:06 +01:00