Tom Roberts 12b39476c0 [rtl] Add speculative branch signal ... - Drive a speculative version of the branch signal into the IF stage to drive address muxing - The speculative signal is the same as the regular branch signal but assumes all conditional branches are taken - This breaks the timing path from branch condition calculation into address muxing (and therefore PMP error calculation) - When the branch is not taken, any external request we might otherwise have made is suppressed - This has a minor performance cost (0.8% without I$, ~0% with I$) Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>		2020-05-26 09:41:37 +01:00
..
_static	[Doc] Fix for table wrapping in RTD theme	2019-10-04 11:36:24 +01:00
images	[I-Cache] Initial commit of prototype RTL	2020-03-06 16:34:48 +00:00
.gitignore	Convert documentation to restructured text	2018-11-13 16:21:47 +01:00
concierge.rst	[doc] Add Ibex Concierge documentation	2020-04-01 18:16:23 +01:00
conf.py	Doc: Documented supported tool versions	2020-02-12 15:57:40 +00:00
cs_registers.rst	[rtl] Add dummy instruction insertion	2020-05-21 13:58:01 +01:00
debug.rst	[doc] Link to RISC-V Debug Specification	2020-04-23 13:48:32 +01:00
examples.rst	[doc] Fix reference link	2020-02-20 15:50:53 +00:00
exception_interrupts.rst	Ignore all interrupts in NMI mode, clarify interrupt documentation	2020-01-31 13:09:09 +01:00
getting_started.rst	Clarify application scenarios of register file versions	2019-06-26 14:09:23 +01:00
icache.rst	[rtl] Add speculative branch signal	2020-05-26 09:41:37 +01:00
index.rst	[rtl] Add dummy instruction insertion	2020-05-21 13:58:01 +01:00
instruction_decode_execute.rst	[bitmanip] Add ZBR instruction group	2020-05-22 17:21:03 +02:00
instruction_fetch.rst	[rtl] Instantiate instruction cache	2020-03-23 12:57:31 +00:00
integration.rst	[bitmanip] Add ZBR instruction group	2020-05-22 17:21:03 +02:00
introduction.rst	[I-Cache] Initial commit of prototype RTL	2020-03-06 16:34:48 +00:00
licensing.rst	Licensing documentation: Add commercial support info	2019-10-16 15:08:45 +01:00
load_store_unit.rst	[Doc] Add more pipeline details	2019-10-04 11:36:24 +01:00
make.bat	Adjust documentation for ibex	2019-04-26 15:09:00 +01:00
Makefile	Adjust documentation for ibex	2019-04-26 15:09:00 +01:00
performance_counters.rst	[doc] Minor fixes	2020-05-01 20:09:59 +02:00
pipeline_details.rst	[RTL] Add configurable third pipeline stage	2020-03-06 15:29:14 +00:00
pmp.rst	Correct PMP granularity equation	2020-03-26 10:02:06 +00:00
register_file.rst	[rtl] Add FPGA Register File	2020-01-14 16:21:58 +01:00
requirements.txt	Doc: Switch back to upstream Sphinx	2019-06-05 12:56:58 +01:00
rvfi.rst	Doc: Adapt RVFI section, add connection in intro	2019-06-07 13:49:12 +01:00
security.rst	[rtl] Add dummy instruction insertion	2020-05-21 13:58:01 +01:00
system_requirements.rst	Doc: Documented supported tool versions	2020-02-12 15:57:40 +00:00
tracer.rst	Document new tracer implementation	2019-10-02 18:28:26 +01:00
verification.rst	[dv] Enable verification of the Bitmanip Extension with OVPsim and Spike	2020-04-27 09:51:57 +02:00