Tom Roberts ef17d4fcc2 [rtl] Add Icache ECC ... - Add modules for ecc generation and checking - Add supporting logic to icache module Signed-off-by: Tom Roberts <tomroberts@lowrisc.org>		2020-03-18 11:28:06 +00:00
..
_static	[Doc] Fix for table wrapping in RTD theme	2019-10-04 11:36:24 +01:00
images	[I-Cache] Initial commit of prototype RTL	2020-03-06 16:34:48 +00:00
.gitignore	Convert documentation to restructured text	2018-11-13 16:21:47 +01:00
conf.py	Doc: Documented supported tool versions	2020-02-12 15:57:40 +00:00
cs_registers.rst	[dbg] Add minimal hardware breakpoint support	2019-12-11 15:02:06 +00:00
debug.rst	[dbg] Add minimal hardware breakpoint support	2019-12-11 15:02:06 +00:00
examples.rst	[doc] Fix reference link	2020-02-20 15:50:53 +00:00
exception_interrupts.rst	Ignore all interrupts in NMI mode, clarify interrupt documentation	2020-01-31 13:09:09 +01:00
getting_started.rst	Clarify application scenarios of register file versions	2019-06-26 14:09:23 +01:00
icache.rst	[rtl] Add Icache ECC	2020-03-18 11:28:06 +00:00
index.rst	[I-Cache] Initial commit of prototype RTL	2020-03-06 16:34:48 +00:00
instruction_decode_execute.rst	[rtl] Add Single Cycle Multiplier targeting FPGA	2020-02-11 16:09:41 +01:00
instruction_fetch.rst	[Doc] Add more pipeline details	2019-10-04 11:36:24 +01:00
integration.rst	[RTL] Add configurable third pipeline stage	2020-03-06 15:29:14 +00:00
introduction.rst	[I-Cache] Initial commit of prototype RTL	2020-03-06 16:34:48 +00:00
licensing.rst	Licensing documentation: Add commercial support info	2019-10-16 15:08:45 +01:00
load_store_unit.rst	[Doc] Add more pipeline details	2019-10-04 11:36:24 +01:00
make.bat	Adjust documentation for ibex	2019-04-26 15:09:00 +01:00
Makefile	Adjust documentation for ibex	2019-04-26 15:09:00 +01:00
performance_counters.rst	[rtl/sw] Add multiply and divide wait counters	2020-03-13 14:48:29 +00:00
pipeline_details.rst	[RTL] Add configurable third pipeline stage	2020-03-06 15:29:14 +00:00
pmp.rst	[RTL] - Add PMP module	2019-08-29 17:43:37 +01:00
register_file.rst	[rtl] Add FPGA Register File	2020-01-14 16:21:58 +01:00
requirements.txt	Doc: Switch back to upstream Sphinx	2019-06-05 12:56:58 +01:00
rvfi.rst	Doc: Adapt RVFI section, add connection in intro	2019-06-07 13:49:12 +01:00
system_requirements.rst	Doc: Documented supported tool versions	2020-02-12 15:57:40 +00:00
tracer.rst	Document new tracer implementation	2019-10-02 18:28:26 +01:00
verification.rst	Add missing space after code-block directive	2020-03-12 16:51:21 +00:00