[cfg] Add PMP parameters to ibex_config.yaml

Also renames configs as part of this as they start to get unweildy if
all features get described in the config name.
This commit is contained in:
Greg Chadwick 2020-05-14 09:40:09 +01:00
parent 9bd3350bb3
commit 00b46d9abe
10 changed files with 201 additions and 82 deletions

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@ -1,4 +1,4 @@
IBEX_CONFIG ?= small-3cmult IBEX_CONFIG ?= small
FUSESOC_CONFIG_OPTS = $(shell ./util/ibex_config.py $(IBEX_CONFIG) fusesoc_opts) FUSESOC_CONFIG_OPTS = $(shell ./util/ibex_config.py $(IBEX_CONFIG) fusesoc_opts)

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@ -154,6 +154,6 @@ jobs:
- template : ci/ibex-rtl-ci-steps.yml - template : ci/ibex-rtl-ci-steps.yml
parameters: parameters:
ibex_configs: ibex_configs:
- small-3cmult - small
- experimental-maxperf-1cmult - experimental-maxperf-pmp
- experimental-maxperf-bm-1cmult - experimental-maxperf-pmp-bm

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@ -28,32 +28,60 @@ parameters:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 1 default: 1
description: Enable the M ISA extension (hardware multiply/divide) description: "Enable the M ISA extension (hardware multiply/divide) [0/1]"
RV32E: RV32E:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enable the E ISA extension (reduced register set) description: "Enable the E ISA extension (reduced register set) [0/1]"
RV32B: RV32B:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enable the B ISA extension (bit manipulation EXPERIMENTAL) description: "Enable the B ISA extension (bit manipulation EXPERIMENTAL) [0/1]"
SRAM_INIT_FILE:
datatype: str
paramtype: vlogdefine
description: "Path to a vmem file to initialize the RAM with"
MultiplierImplementation: MultiplierImplementation:
datatype: str datatype: str
paramtype: vlogparam paramtype: vlogparam
description: "Multiplier implementation. Valid values: fast, slow, single-cycle" description: "Multiplier implementation. Valid values: fast, slow, single-cycle"
default: "fast" default: "fast"
BranchTargetALU: BranchTargetALU:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enables seperate branch target ALU (increasing branch performance EXPERIMENTAL) description: "Enables seperate branch target ALU (increasing branch performance EXPERIMENTAL)"
WritebackStage: WritebackStage:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enables third pipeline stage (EXPERIMENTAL) description: "Enables third pipeline stage (EXPERIMENTAL)"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 0
paramtype: vlogparam
description: "Number of PMP regions"
targets: targets:
sim: sim:
@ -68,6 +96,9 @@ targets:
- MultiplierImplementation - MultiplierImplementation
- BranchTargetALU - BranchTargetALU
- WritebackStage - WritebackStage
- PMPEnable
- PMPGranularity
- PMPNumRegions
toplevel: ibex_riscv_compliance toplevel: ibex_riscv_compliance
tools: tools:
verilator: verilator:

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@ -15,6 +15,9 @@ module ibex_riscv_compliance (
input IO_RST_N input IO_RST_N
); );
parameter bit PMPEnable = 1'b0;
parameter int unsigned PMPGranularity = 0;
parameter int unsigned PMPNumRegions = 4;
parameter bit RV32E = 1'b0; parameter bit RV32E = 1'b0;
parameter bit RV32M = 1'b1; parameter bit RV32M = 1'b1;
parameter bit RV32B = 1'b0; parameter bit RV32B = 1'b0;
@ -105,91 +108,94 @@ module ibex_riscv_compliance (
); );
ibex_core_tracing #( ibex_core_tracing #(
.DmHaltAddr(32'h00000000), .PMPEnable (PMPEnable ),
.DmExceptionAddr(32'h00000000), .PMPGranularity (PMPGranularity ),
.RV32E(RV32E), .PMPNumRegions (PMPNumRegions ),
.RV32M(RV32M), .RV32E (RV32E ),
.RV32B(RV32B), .RV32M (RV32M ),
.MultiplierImplementation(MultiplierImplementation), .RV32B (RV32B ),
.BranchTargetALU(BranchTargetALU), .MultiplierImplementation (MultiplierImplementation),
.WritebackStage(WritebackStage) .BranchTargetALU (BranchTargetALU ),
.WritebackStage (WritebackStage ),
.DmHaltAddr (32'h00000000 ),
.DmExceptionAddr (32'h00000000 )
) u_core ( ) u_core (
.clk_i (clk_sys), .clk_i (clk_sys ),
.rst_ni (rst_sys_n), .rst_ni (rst_sys_n ),
.test_en_i ('b0), .test_en_i ('b0 ),
.hart_id_i (32'b0), .hart_id_i (32'b0 ),
// First instruction executed is at 0x0 + 0x80 // First instruction executed is at 0x0 + 0x80
.boot_addr_i (32'h00000000), .boot_addr_i (32'h00000000 ),
.instr_req_o (host_req[CoreI]), .instr_req_o (host_req[CoreI] ),
.instr_gnt_i (host_gnt[CoreI]), .instr_gnt_i (host_gnt[CoreI] ),
.instr_rvalid_i (host_rvalid[CoreI]), .instr_rvalid_i (host_rvalid[CoreI]),
.instr_addr_o (host_addr[CoreI]), .instr_addr_o (host_addr[CoreI] ),
.instr_rdata_i (host_rdata[CoreI]), .instr_rdata_i (host_rdata[CoreI] ),
.instr_err_i (host_err[CoreI]), .instr_err_i (host_err[CoreI] ),
.data_req_o (host_req[CoreD]), .data_req_o (host_req[CoreD] ),
.data_gnt_i (host_gnt[CoreD]), .data_gnt_i (host_gnt[CoreD] ),
.data_rvalid_i (host_rvalid[CoreD]), .data_rvalid_i (host_rvalid[CoreD]),
.data_we_o (host_we[CoreD]), .data_we_o (host_we[CoreD] ),
.data_be_o (host_be[CoreD]), .data_be_o (host_be[CoreD] ),
.data_addr_o (host_addr[CoreD]), .data_addr_o (host_addr[CoreD] ),
.data_wdata_o (host_wdata[CoreD]), .data_wdata_o (host_wdata[CoreD] ),
.data_rdata_i (host_rdata[CoreD]), .data_rdata_i (host_rdata[CoreD] ),
.data_err_i (host_err[CoreD]), .data_err_i (host_err[CoreD] ),
.irq_software_i (1'b0), .irq_software_i (1'b0 ),
.irq_timer_i (1'b0), .irq_timer_i (1'b0 ),
.irq_external_i (1'b0), .irq_external_i (1'b0 ),
.irq_fast_i (15'b0), .irq_fast_i (15'b0 ),
.irq_nm_i (1'b0), .irq_nm_i (1'b0 ),
.debug_req_i ('b0), .debug_req_i ('b0 ),
.fetch_enable_i ('b1), .fetch_enable_i ('b1 ),
.core_sleep_o () .core_sleep_o ( )
); );
// SRAM block for instruction and data storage // SRAM block for instruction and data storage
ram_1p #( ram_1p #(
.Depth(64*1024/4) .Depth(64*1024/4)
) u_ram ( ) u_ram (
.clk_i (clk_sys), .clk_i (clk_sys ),
.rst_ni (rst_sys_n), .rst_ni (rst_sys_n ),
.req_i (device_req[Ram]), .req_i (device_req[Ram] ),
.we_i (device_we[Ram]), .we_i (device_we[Ram] ),
.be_i (device_be[Ram]), .be_i (device_be[Ram] ),
.addr_i (device_addr[Ram]), .addr_i (device_addr[Ram] ),
.wdata_i (device_wdata[Ram]), .wdata_i (device_wdata[Ram] ),
.rvalid_o (device_rvalid[Ram]), .rvalid_o (device_rvalid[Ram]),
.rdata_o (device_rdata[Ram]) .rdata_o (device_rdata[Ram] )
); );
// RISC-V test utility, used by the RISC-V compliance test to interact with // RISC-V test utility, used by the RISC-V compliance test to interact with
// the simulator. // the simulator.
riscv_testutil riscv_testutil
u_riscv_testutil( u_riscv_testutil(
.clk_i (clk_sys), .clk_i (clk_sys ),
.rst_ni (rst_sys_n), .rst_ni (rst_sys_n ),
// Device port // Device port
.dev_req_i (device_req[TestUtilDevice]), .dev_req_i (device_req[TestUtilDevice] ),
.dev_we_i (device_we[TestUtilDevice]), .dev_we_i (device_we[TestUtilDevice] ),
.dev_addr_i (device_addr[TestUtilDevice]), .dev_addr_i (device_addr[TestUtilDevice] ),
.dev_wdata_i (device_wdata[TestUtilDevice]), .dev_wdata_i (device_wdata[TestUtilDevice] ),
.dev_rvalid_o (device_rvalid[TestUtilDevice]), .dev_rvalid_o (device_rvalid[TestUtilDevice]),
.dev_rdata_o (device_rdata[TestUtilDevice]), .dev_rdata_o (device_rdata[TestUtilDevice] ),
.dev_be_i (device_be[TestUtilDevice]), .dev_be_i (device_be[TestUtilDevice] ),
.dev_err_o (device_err[TestUtilDevice]), .dev_err_o (device_err[TestUtilDevice] ),
// Host port // Host port
.host_req_o (host_req[TestUtilHost]), .host_req_o (host_req[TestUtilHost] ),
.host_gnt_i (host_gnt[TestUtilHost]), .host_gnt_i (host_gnt[TestUtilHost] ),
.host_rvalid_i (host_rvalid[TestUtilHost]), .host_rvalid_i (host_rvalid[TestUtilHost] ),
.host_addr_o (host_addr[TestUtilHost]), .host_addr_o (host_addr[TestUtilHost] ),
.host_rdata_i (host_rdata[TestUtilHost]) .host_rdata_i (host_rdata[TestUtilHost] )
); );
endmodule endmodule

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@ -27,36 +27,60 @@ parameters:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 1 default: 1
description: Enable the M ISA extension (hardware multiply/divide) [0/1] description: "Enable the M ISA extension (hardware multiply/divide) [0/1]"
RV32E: RV32E:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enable the E ISA extension (reduced register set) [0/1] description: "Enable the E ISA extension (reduced register set) [0/1]"
RV32B: RV32B:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enable the B ISA extension (bit manipulation EXPERIMENTAL) [0/1] description: "Enable the B ISA extension (bit manipulation EXPERIMENTAL) [0/1]"
SRAM_INIT_FILE: SRAM_INIT_FILE:
datatype: str datatype: str
paramtype: vlogdefine paramtype: vlogdefine
description: Path to a vmem file to initialize the RAM with description: "Path to a vmem file to initialize the RAM with"
MultiplierImplementation: MultiplierImplementation:
datatype: str datatype: str
paramtype: vlogparam paramtype: vlogparam
description: "Multiplier implementation. Valid values: fast, slow, single-cycle" description: "Multiplier implementation. Valid values: fast, slow, single-cycle"
default: "fast" default: "fast"
BranchTargetALU: BranchTargetALU:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enables seperate branch target ALU (increasing branch performance EXPERIMENTAL) description: "Enables seperate branch target ALU (increasing branch performance EXPERIMENTAL)"
WritebackStage: WritebackStage:
datatype: int datatype: int
paramtype: vlogparam paramtype: vlogparam
default: 0 default: 0
description: Enables third pipeline stage (EXPERIMENTAL) description: "Enables third pipeline stage (EXPERIMENTAL)"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 0
paramtype: vlogparam
description: "Number of PMP regions"
targets: targets:
sim: sim:
@ -71,6 +95,9 @@ targets:
- MultiplierImplementation - MultiplierImplementation
- BranchTargetALU - BranchTargetALU
- WritebackStage - WritebackStage
- PMPEnable
- PMPGranularity
- PMPNumRegions
- SRAM_INIT_FILE - SRAM_INIT_FILE
toplevel: ibex_simple_system toplevel: ibex_simple_system
tools: tools:

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@ -19,6 +19,9 @@ module ibex_simple_system (
input IO_RST_N input IO_RST_N
); );
parameter bit PMPEnable = 1'b0;
parameter int unsigned PMPGranularity = 0;
parameter int unsigned PMPNumRegions = 4;
parameter bit RV32E = 1'b0; parameter bit RV32E = 1'b0;
parameter bit RV32M = 1'b1; parameter bit RV32M = 1'b1;
parameter bit RV32B = 1'b0; parameter bit RV32B = 1'b0;
@ -138,15 +141,18 @@ module ibex_simple_system (
); );
ibex_core_tracing #( ibex_core_tracing #(
.PMPEnable ( PMPEnable ),
.PMPGranularity ( PMPGranularity ),
.PMPNumRegions ( PMPNumRegions ),
.MHPMCounterNum ( 29 ), .MHPMCounterNum ( 29 ),
.DmHaltAddr ( 32'h00100000 ),
.DmExceptionAddr ( 32'h00100000 ),
.RV32E ( RV32E ), .RV32E ( RV32E ),
.RV32M ( RV32M ), .RV32M ( RV32M ),
.RV32B ( RV32B ), .RV32B ( RV32B ),
.BranchTargetALU ( BranchTargetALU ), .BranchTargetALU ( BranchTargetALU ),
.WritebackStage ( WritebackStage ), .WritebackStage ( WritebackStage ),
.MultiplierImplementation ( MultiplierImplementation ) .MultiplierImplementation ( MultiplierImplementation ),
.DmHaltAddr ( 32'h00100000 ),
.DmExceptionAddr ( 32'h00100000 )
) u_core ( ) u_core (
.clk_i (clk_sys), .clk_i (clk_sys),
.rst_ni (rst_sys_n), .rst_ni (rst_sys_n),

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@ -7,13 +7,16 @@
# Two-stage pipeline without additional branch target ALU and 3 cycle multiplier # Two-stage pipeline without additional branch target ALU and 3 cycle multiplier
# (4 cycles for mulh), resulting in 2 stall cycles for mul (3 for mulh) # (4 cycles for mulh), resulting in 2 stall cycles for mul (3 for mulh)
small-3cmult: small:
RV32E : 0 RV32E : 0
RV32M : 1 RV32M : 1
RV32B : 0 RV32B : 0
BranchTargetALU : 0 BranchTargetALU : 0
WritebackStage : 0 WritebackStage : 0
MultiplierImplementation : "fast" MultiplierImplementation : "fast"
PMPEnable : 0
PMPGranularity : 0
PMPNumRegions : 4
# =============================== # ===============================
# * EXPERIMENTAL CONFIGURATIONS * # * EXPERIMENTAL CONFIGURATIONS *
@ -21,20 +24,26 @@ small-3cmult:
# Three-stage pipeline with additional branch traget ALU and 1 cycle multiplier # Three-stage pipeline with additional branch traget ALU and 1 cycle multiplier
# (2 cycles for mulh) so mul does not stall (mulh stall 1 cycles). This is the # (2 cycles for mulh) so mul does not stall (mulh stall 1 cycles). This is the
# maximum performance configuration. # maximum performance configuration. PMP is enabled with 16 regions.
experimental-maxperf-1cmult: experimental-maxperf-pmp:
RV32E : 0 RV32E : 0
RV32M : 1 RV32M : 1
RV32B : 0 RV32B : 0
BranchTargetALU : 1 BranchTargetALU : 1
WritebackStage : 1 WritebackStage : 1
MultiplierImplementation : "single-cycle" MultiplierImplementation : "single-cycle"
PMPEnable : 1
PMPGranularity : 0
PMPNumRegions : 16
# maxpref-1cmult config above with bitmanip extension # experimental-maxperf-pmp config above with bitmanip extension
experimental-maxperf-bm-1cmult: experimental-maxperf-pmp-bm:
RV32E : 0 RV32E : 0
RV32M : 1 RV32M : 1
RV32B : 1 RV32B : 1
BranchTargetALU : 1 BranchTargetALU : 1
WritebackStage : 1 WritebackStage : 1
MultiplierImplementation : "single-cycle" MultiplierImplementation : "single-cycle"
PMPEnable : 1
PMPGranularity : 0
PMPNumRegions : 16

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@ -108,6 +108,24 @@ parameters:
paramtype: vlogparam paramtype: vlogparam
description: "Enables security hardening features (EXPERIMENTAL) [0/1]" description: "Enables security hardening features (EXPERIMENTAL) [0/1]"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 0
paramtype: vlogparam
description: "Number of PMP regions"
targets: targets:
default: default:
filesets: filesets:

View file

@ -83,6 +83,24 @@ parameters:
paramtype: vlogparam paramtype: vlogparam
description: "Enables security hardening features (EXPERIMENTAL) [0/1]" description: "Enables security hardening features (EXPERIMENTAL) [0/1]"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 0
paramtype: vlogparam
description: "Number of PMP regions"
targets: targets:
default: default:
filesets: filesets:
@ -108,6 +126,9 @@ targets:
- WritebackStage - WritebackStage
- MultiplierImplementation - MultiplierImplementation
- SecureIbex - SecureIbex
- PMPEnable
- PMPGranularity
- PMPNumRegions
default_tool: verilator default_tool: verilator
toplevel: ibex_core_tracing toplevel: ibex_core_tracing
tools: tools:

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@ -20,6 +20,7 @@ lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'RV32B'*"
lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'BranchTargetALU'*" lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'BranchTargetALU'*"
lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'WritebackStage'*" lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'WritebackStage'*"
lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'SecureIbex'*" lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'SecureIbex'*"
lint_off -rule WIDTH -file "*/rtl/ibex_core_tracing.sv" -match "*'PMPEnable'*"
// Filename 'ibex_register_file_ff' does not match MODULE name: ibex_register_file // Filename 'ibex_register_file_ff' does not match MODULE name: ibex_register_file
// ibex_register_file_ff and ibex_register_file_latch provide two // ibex_register_file_ff and ibex_register_file_latch provide two