[rtl/alu] Remove unused comparison operations

These operations (ALU_GT, ALU_GTU, ALU_LE, ALU_LEU) are remnants of
of the original OpenRISC design. RISC-V does not have these instructions
and instead implements the operations by reversing operands for ALU_LT,
ALU_LTU, ALU_GE, ALU_GEU.

This resolves lowRISC/ibex#420 reported by @udinator.
This commit is contained in:
Pirmin Vogel 2019-10-24 15:06:25 +01:00
parent 294849bb18
commit 0331ed61b1
3 changed files with 11 additions and 29 deletions

View file

@ -28,7 +28,7 @@ lint_off -msg UNUSED -file "*/rtl/ibex_if_stage.sv" -lines 80
// Bits of signal are not used: shift_right_result_ext[32] // Bits of signal are not used: shift_right_result_ext[32]
// cleaner to write all bits even if not all are used // cleaner to write all bits even if not all are used
lint_off -msg UNUSED -file "*/rtl/ibex_alu.sv" -lines 107 lint_off -msg UNUSED -file "*/rtl/ibex_alu.sv" -lines 105
// Bits of signal are not used: alu_adder_ext_i[0] // Bits of signal are not used: alu_adder_ext_i[0]
// Bottom bit is round, not needed // Bottom bit is round, not needed

View file

@ -50,10 +50,8 @@ module ibex_alu (
// Comparator OPs // Comparator OPs
ALU_EQ, ALU_NE, ALU_EQ, ALU_NE,
ALU_GTU, ALU_GEU, ALU_GE, ALU_GEU,
ALU_LTU, ALU_LEU, ALU_LT, ALU_LTU,
ALU_GT, ALU_GE,
ALU_LT, ALU_LE,
ALU_SLT, ALU_SLTU, ALU_SLT, ALU_SLTU,
ALU_SLET, ALU_SLETU: adder_op_b_negate = 1'b1; ALU_SLET, ALU_SLETU: adder_op_b_negate = 1'b1;
@ -128,10 +126,8 @@ module ibex_alu (
cmp_signed = 1'b0; cmp_signed = 1'b0;
unique case (operator_i) unique case (operator_i)
ALU_GT,
ALU_GE, ALU_GE,
ALU_LT, ALU_LT,
ALU_LE,
ALU_SLT, ALU_SLT,
ALU_SLET: begin ALU_SLET: begin
cmp_signed = 1'b1; cmp_signed = 1'b1;
@ -144,7 +140,6 @@ module ibex_alu (
assign is_equal = (adder_result == 32'b0); assign is_equal = (adder_result == 32'b0);
assign is_equal_result_o = is_equal; assign is_equal_result_o = is_equal;
// Is greater equal // Is greater equal
always_comb begin always_comb begin
if ((operand_a_i[31] ^ operand_b_i[31]) == 1'b0) begin if ((operand_a_i[31] ^ operand_b_i[31]) == 1'b0) begin
@ -166,8 +161,6 @@ module ibex_alu (
// (a[31] == 1 && b[31] == 0) => 0 // (a[31] == 1 && b[31] == 0) => 0
// (a[31] == 0 && b[31] == 1) => 1 // (a[31] == 0 && b[31] == 1) => 1
// generate comparison result // generate comparison result
logic cmp_result; logic cmp_result;
@ -177,13 +170,10 @@ module ibex_alu (
unique case (operator_i) unique case (operator_i)
ALU_EQ: cmp_result = is_equal; ALU_EQ: cmp_result = is_equal;
ALU_NE: cmp_result = ~is_equal; ALU_NE: cmp_result = ~is_equal;
ALU_GT, ALU_GTU: cmp_result = is_greater_equal & ~is_equal;
ALU_GE, ALU_GEU: cmp_result = is_greater_equal; ALU_GE, ALU_GEU: cmp_result = is_greater_equal;
ALU_LT, ALU_SLT, ALU_LT, ALU_LTU,
ALU_LTU, ALU_SLTU: cmp_result = ~is_greater_equal; ALU_SLT, ALU_SLTU: cmp_result = ~is_greater_equal;
ALU_SLET, ALU_SLET, ALU_SLETU: cmp_result = ~is_greater_equal | is_equal;
ALU_SLETU,
ALU_LE, ALU_LEU: cmp_result = ~is_greater_equal | is_equal;
default:; default:;
endcase endcase
@ -191,8 +181,6 @@ module ibex_alu (
assign comparison_result_o = cmp_result; assign comparison_result_o = cmp_result;
//////////////// ////////////////
// Result mux // // Result mux //
//////////////// ////////////////
@ -215,10 +203,8 @@ module ibex_alu (
// Comparison Operations // Comparison Operations
ALU_EQ, ALU_NE, ALU_EQ, ALU_NE,
ALU_GTU, ALU_GEU, ALU_GE, ALU_GEU,
ALU_LTU, ALU_LEU, ALU_LT, ALU_LTU,
ALU_GT, ALU_GE,
ALU_LT, ALU_LE,
ALU_SLT, ALU_SLTU, ALU_SLT, ALU_SLTU,
ALU_SLET, ALU_SLETU: result_o = {31'h0,cmp_result}; ALU_SLET, ALU_SLETU: result_o = {31'h0,cmp_result};

View file

@ -50,10 +50,6 @@ typedef enum logic [4:0] {
// Comparisons // Comparisons
ALU_LT, ALU_LT,
ALU_LTU, ALU_LTU,
ALU_LE,
ALU_LEU,
ALU_GT,
ALU_GTU,
ALU_GE, ALU_GE,
ALU_GEU, ALU_GEU,
ALU_EQ, ALU_EQ,