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https://github.com/lowRISC/ibex.git
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[DV] Standardize logging, allow parallel simulation (#315)
This commit is contained in:
taoliug
udinator
parent
7280301369
commit
0667c14f15
2 changed files with 45 additions and 31 deletions
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@ -123,6 +123,7 @@ rtl_sim:
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--simulator=${SIMULATOR} \
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--en_cov ${COV} \
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--en_wave ${WAVES} \
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--lsf_cmd="${LSF_CMD}" \
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--sim_opts="+signature_addr=0x${SIGNATURE_ADDR}" \
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${SIM_OPTS}
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@ -22,6 +22,7 @@ import random
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import re
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import subprocess
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import sys
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import logging
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sys.path.insert(0, "../../vendor/google_riscv-dv/scripts")
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sys.path.insert(0, "./riscv_dv_extension")
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@ -32,6 +33,23 @@ from spike_log_to_trace_csv import *
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from ovpsim_log_to_trace_csv import *
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from instr_trace_compare import *
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# TODO: Move this common function to riscv-dv/lib
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def setup_logging(verbose):
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"""Setup the root logger.
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Args:
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verbose: Verbose logging
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"""
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if verbose:
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logging.basicConfig(format="%(asctime)s %(filename)s:%(lineno)-5s %(levelname)-8s %(message)s",
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datefmt='%a, %d %b %Y %H:%M:%S',
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level=logging.DEBUG)
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else:
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logging.basicConfig(format="%(asctime)s %(levelname)-8s %(message)s",
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datefmt='%a, %d %b %Y %H:%M:%S',
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level=logging.INFO)
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def process_cmd(keyword, cmd, opts, enable):
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""" Process the compile and simulation command
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@ -63,12 +81,12 @@ def get_simulator_cmd(simulator, simulator_yaml, en_cov, en_wave):
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compile_cmd : RTL simulator command to compile the instruction generator
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sim_cmd : RTL simulator command to run the instruction generator
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"""
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print("Processing simulator setup file : %s" % simulator_yaml)
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logging.info("Processing simulator setup file : %s" % simulator_yaml)
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yaml_data = read_yaml(simulator_yaml)
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# Search for matched simulator
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for entry in yaml_data:
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if entry['tool'] == simulator:
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print("Found matching simulator: %s" % entry['tool'])
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logging.info("Found matching simulator: %s" % entry['tool'])
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compile_cmd = entry['compile']['cmd']
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for i in range(len(compile_cmd)):
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compile_cmd[i] = process_cmd("<cov_opts>", compile_cmd[i],
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@ -79,11 +97,11 @@ def get_simulator_cmd(simulator, simulator_yaml, en_cov, en_wave):
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sim_cmd = process_cmd("<cov_opts>", sim_cmd, entry['sim']['cov_opts'], en_cov)
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sim_cmd = process_cmd("<wave_opts>", sim_cmd, entry['sim']['wave_opts'], en_wave)
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return compile_cmd, sim_cmd
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print ("Cannot find RTL simulator %0s" % simulator)
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logging.info("Cannot find RTL simulator %0s" % simulator)
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sys.exit(1)
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def rtl_compile(compile_cmd, test_list, output_dir, lsf_cmd, opts, verbose):
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def rtl_compile(compile_cmd, test_list, output_dir, lsf_cmd, opts):
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"""Run the instruction generator
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Args:
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@ -92,21 +110,17 @@ def rtl_compile(compile_cmd, test_list, output_dir, lsf_cmd, opts, verbose):
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output_dir : Output directory of the ELF files
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lsf_cmd : LSF command to run compilation
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opts : Compile options for the generator
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verbose : Verbose logging
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"""
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# Compile the TB
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print ("Compiling TB")
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logging.info("Compiling TB")
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for cmd in compile_cmd:
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cmd = re.sub("<out>", output_dir, cmd)
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cmd = re.sub("<cmp_opts>", opts, cmd)
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if verbose:
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print("Compile command: %s" % cmd)
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output = run_cmd(cmd)
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if verbose:
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print(output)
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logging.debug("Compile command: %s" % cmd)
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run_cmd(cmd)
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def rtl_sim(sim_cmd, test_list, output_dir, bin_dir, lsf_cmd, seed, opts, verbose):
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def rtl_sim(sim_cmd, test_list, output_dir, bin_dir, lsf_cmd, seed, opts):
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"""Run the instruction generator
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Args:
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@ -117,13 +131,12 @@ def rtl_sim(sim_cmd, test_list, output_dir, bin_dir, lsf_cmd, seed, opts, verbos
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lsf_cmd : LSF command to run simulation
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seed : Seed of RTL simulation
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opts : Simulation options
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verbose : Verbose logging
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"""
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# Run the RTL simulation
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sim_cmd = re.sub("<out>", output_dir, sim_cmd)
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sim_cmd = re.sub("<sim_opts>", opts, sim_cmd)
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sim_cmd = re.sub("<cwd>", cwd, sim_cmd)
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print ("Running RTL simulation...")
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logging.info("Running RTL simulation...")
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cmd_list = []
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for test in test_list:
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for i in range(test['iterations']):
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@ -131,23 +144,23 @@ def rtl_sim(sim_cmd, test_list, output_dir, bin_dir, lsf_cmd, seed, opts, verbos
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test_sim_cmd = re.sub("<seed>", str(rand_seed), sim_cmd)
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if "sim_opts" in test:
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test_sim_cmd += test['sim_opts']
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print(test_sim_cmd)
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sim_dir = output_dir + ("/%s.%d" %(test['test'], i))
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run_cmd(("mkdir -p %s" % sim_dir))
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os.chdir(sim_dir)
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if verbose:
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print("Run dir: %s" % sim_dir)
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binary = ("%s/%s_%d.bin" % (bin_dir, test['test'], i))
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cmd = lsf_cmd + " " + test_sim_cmd.rstrip() + \
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cmd = lsf_cmd + " " + test_sim_cmd + \
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(" +UVM_TESTNAME=%s " % test['rtl_test']) + \
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(" +bin=%s " % binary) + \
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(" -l sim.log ")
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print("Running %s with %s" % (test['rtl_test'], binary))
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if verbose:
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print(cmd)
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output = run_cmd(' '.join(cmd.split()))
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if verbose:
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print(output)
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cmd = re.sub('\n', '', cmd)
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if lsf_cmd == "":
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logging.info("Running %s with %s" % (test['rtl_test'], binary))
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run_cmd(cmd, 300)
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else:
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cmd_list.append(cmd)
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if lsf_cmd != "":
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logging.info("Running %0d simulation jobs." % len(cmd_list))
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run_parallel_cmd(cmd_list, 600)
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def compare(test_list, iss, output_dir, verbose):
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@ -163,7 +176,7 @@ def compare(test_list, iss, output_dir, verbose):
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for test in test_list:
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for i in range(0, test['iterations']):
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elf = ("%s/asm_tests/%s.%d.o" % (output_dir, test['test'], i))
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print("Comparing %s/DUT sim result : %s" % (iss, elf))
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logging.info("Comparing %s/DUT sim result : %s" % (iss, elf))
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run_cmd(("echo 'Test binary: %s' >> %s" % (elf, report)))
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uvm_log = ("%s/rtl_sim/%s.%d/sim.log" % (output_dir, test['test'], i))
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rtl_log = ("%s/rtl_sim/%s.%d/trace_core_00000000.log" % (output_dir, test['test'], i))
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@ -180,7 +193,7 @@ def compare(test_list, iss, output_dir, verbose):
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elif iss == "ovpsim":
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process_ovpsim_sim_log(iss_log, iss_csv)
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else:
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print("Unsupported ISS" % iss)
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logging.info("Unsupported ISS" % iss)
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sys.exit(1)
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uvm_result = check_ibex_uvm_log(uvm_log, "ibex", test_name, report, False)
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if not uvm_result:
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@ -201,9 +214,9 @@ def compare(test_list, iss, output_dir, verbose):
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passed_cnt = run_cmd("grep PASSED %s | wc -l" % report).strip()
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failed_cnt = run_cmd("grep FAILED %s | wc -l" % report).strip()
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summary = ("%s PASSED, %s FAILED" % (passed_cnt, failed_cnt))
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print(summary)
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logging.info(summary)
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run_cmd(("echo %s >> %s" % (summary, report)))
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print("RTL & ISS regression report is saved to %s" % report)
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logging.info("RTL & ISS regression report is saved to %s" % report)
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# Parse input arguments
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@ -242,6 +255,7 @@ parser.add_argument("--lsf_cmd", type=str, default="",
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command is not specified")
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args = parser.parse_args()
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setup_logging(args.verbose)
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parser.set_defaults(verbose=False)
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cwd = os.path.dirname(os.path.realpath(__file__))
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@ -263,13 +277,12 @@ compile_cmd, sim_cmd = get_simulator_cmd(args.simulator, args.simulator_yaml,
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args.en_cov, args.en_wave)
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# Compile TB
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if args.steps == "all" or re.match("compile", args.steps):
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rtl_compile(compile_cmd, matched_list, output_dir,
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args.lsf_cmd, args.cmp_opts, args.verbose)
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rtl_compile(compile_cmd, matched_list, output_dir, args.lsf_cmd, args.cmp_opts)
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# Run RTL simulation
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if args.steps == "all" or re.match("sim", args.steps):
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rtl_sim(sim_cmd, matched_list, output_dir, bin_dir, args.lsf_cmd,
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args.seed, args.sim_opts, args.verbose)
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args.seed, args.sim_opts)
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# Compare RTL & ISS simulation result.;
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if args.steps == "all" or re.match("compare", args.steps):
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