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[rtl] Fix MISA

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Initially the 'B' bit was going to be used to indicate the presence of
the bit-manipulation extension. Now that has been seperated into
multiple smaller extensions the 'B' MISA bit isn't being used and
remains a reserved bit that should read as 0.

For the RV32B configurations where we implement non ratified
bit-manipulation extensions we must set the 'X' bit.

These changes matche the behaviour of spike.
This commit is contained in:
Greg Chadwick 2022-08-05 11:19:16 +01:00 • committed by Greg Chadwick
parent ae76c62623
commit 19d12ee3a7
1 changed files with 3 additions and 3 deletions
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6
rtl/ibex_cs_registers.sv
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@ -124,14 +124,14 @@ module ibex_cs_registers #(
import ibex_pkg::*;
localparam int unsigned RV32BEnabled = (RV32B == RV32BNone) ? 0 : 1;
localparam int unsigned RV32BExtra = (RV32B == RV32BOTEarlGrey) || (RV32B == RV32BFull) ? 1 : 0;
localparam int unsigned RV32MEnabled = (RV32M == RV32MNone) ? 0 : 1;
localparam int unsigned PMPAddrWidth = (PMPGranularity > 0) ? 33 - PMPGranularity : 32;
// misa
localparam logic [31:0] MISA_VALUE =
(0 << 0) // A - Atomic Instructions extension
| (RV32BEnabled << 1) // B - Bit-Manipulation extension
| (0 << 1) // B - Bit-Manipulation extension
| (1 << 2) // C - Compressed extension
| (0 << 3) // D - Double precision floating-point extension
| (32'(RV32E) << 4) // E - RV32E base ISA
@ -141,7 +141,7 @@ module ibex_cs_registers #(
| (0 << 13) // N - User level interrupts supported
| (0 << 18) // S - Supervisor mode implemented
| (1 << 20) // U - User mode implemented
| (0 << 23) // X - Non-standard extensions present
| (RV32BExtra << 23) // X - Non-standard extensions present
| (32'(CSR_MISA_MXL) << 30); // M-XLEN
typedef struct packed {