mirror of
https://github.com/lowRISC/ibex.git
synced 2025-04-20 03:47:15 -04:00
deleted redundant files
This commit is contained in:
Saad Khalid
Greg Chadwick
parent
bfcaa25ee1
commit
26717c8989
4 changed files with 142 additions and 1582 deletions
142
dv/uvm/core_ibex/directed_tests/gen_testlist.py
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142
dv/uvm/core_ibex/directed_tests/gen_testlist.py
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@ -0,0 +1,142 @@
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#!/usr/bin/env python3
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"""
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Generating testlists for following opensource test suites
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- riscv-tests
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- riscv-arch-tests
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- ePMP directed tests
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"""
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# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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import os
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import argparse
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import sys
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def add_configs():
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testlist_string = '''# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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##########################################################
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# This file is generated by gen_testlist.py script and largely copies
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# the formatting of the testlist.yaml used by riscv-dv, but only specifies
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# directed tests.
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#
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# - All paths are relative to THIS FILE.
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# - Each 'test' can specify a config by name to re-use common configuration
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# - If a test redefines a key already in the config, the test option takes priority.
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##########################################################
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- config: riscv-tests
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ld_script: link.ld
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includes: .
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gcc_opts: -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
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-I../../../vendor/riscv-test-env/
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-I../../../vendor/riscv-test-env/p/
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-I../../../vendor/riscv-tests/isa/macros/scalar/
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rtl_test: core_ibex_base_test
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rtl_params:
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PMPEnable: 1
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timeout_s: 300
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- config: riscv-arch-tests
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ld_script: link.ld
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includes: .
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gcc_opts: -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
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-I../../../vendor/riscv-arch-tests/riscv-test-suite/env/
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-I../../../vendor/riscv-isa-sim/arch_test_target/spike/
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rtl_test: core_ibex_base_test
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rtl_params:
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PMPEnable: 1
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timeout_s: 300
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- config: epmp-tests
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ld_script: ../../../../vendor/riscv-isa-sim/tests/mseccfg/mseccfg_test.ld
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includes: .
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gcc_opts: -march=rv32imc -O2 -I . -I ./. -I ../softfloat -I ../riscv -fno-builtin-printf
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-fdata-sections -fno-section-anchors -DPRINTF_SUPPORTED=1
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../../../vendor/riscv-isa-sim/tests/mseccfg/crt.S
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../../../vendor/riscv-isa-sim/tests/mseccfg/syscalls.c
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-mcmodel=medany -static -nostdlib -nostartfiles -lm -lgcc
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-Wl,-M -Wl,-Map=link.log
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rtl_test: core_ibex_base_test
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rtl_params:
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PMPEnable: 1
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timeout_s: 300
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'''
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with open('directed_testlist.yaml', "a") as f:
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f.write(testlist_string)
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def append_directed_testlist(tests, test_suite, test_suite_name, is_assembly):
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testlist_string = '''
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# Test-suite: {test_suite_name}
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'''.format(test_suite_name = test_suite_name)
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extension = '.S' if is_assembly else '.c'
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extension_grep = ' | egrep .S' if is_assembly else ' | egrep .c'
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for test_group_name in tests:
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available_tests = os.popen('ls '+test_suite+test_group_name+extension_grep).read()
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available_testlist = []
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for test in available_tests.split('\n')[:-1]:
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available_testlist.append(test)
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for test_name_str in available_testlist:
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test_name = test_name_str.split(extension)[0]
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testlist_string = testlist_string + '''
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- test: {test_name}
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desc: >
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riscv test - {test_name}
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iterations: 1
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test_srcs: {test_suite}{test_group_name}/{test_name}{extension}
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config: {config}
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'''.format(test_name = test_name, test_group_name = test_group_name, test_suite = test_suite,
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config = test_suite_name, extension = extension)
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with open('directed_testlist.yaml', "a") as f:
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f.write(testlist_string)
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def list_tests(dir):
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testlist_str = os.popen('ls '+dir).read()
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testlist = []
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for test in testlist_str.split('\n')[:-1]:
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testlist.append(test)
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print(testlist)
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return testlist
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def _main() -> int:
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parser = argparse.ArgumentParser()
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parser.add_argument('--add_tests',
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type=str, required=True)
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args = parser.parse_args()
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test_suite = args.add_tests
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test_suite_list = test_suite.split(',')
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# remove any previous yaml file
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with open('directed_testlist.yaml','r+') as file:
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file.truncate(0)
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# add headers and configs
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add_configs()
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if 'riscv-tests' in test_suite_list:
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isa_tests = {'rv32mi', 'rv32uc', 'rv32ui', 'rv32um'}
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append_directed_testlist(isa_tests, '../../../../vendor/riscv-tests/isa/', 'riscv-tests', 1)
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if 'riscv-arch-tests' in test_suite_list:
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arch_tests = {'rv32i_m/B/src', 'rv32i_m/C/src', 'rv32i_m/I/src', 'rv32i_m/M/src', 'rv32i_m/Zifencei/src'}
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append_directed_testlist(arch_tests, '../../../../vendor/riscv-arch-tests/riscv-test-suite/', 'riscv-arch-tests', 1)
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if 'epmp-tests' in test_suite_list:
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append_directed_testlist({'outputs'}, '../../../../vendor/riscv-isa-sim/tests/mseccfg/gengen_src/', 'epmp-tests', 0)
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# Always return 0 (success), even if the test failed. We've successfully
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# generated a comparison log either way and we don't want to stop Make from
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# gathering them all up for us.
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return 0
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if __name__ == '__main__':
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sys.exit(_main())
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@ -1,524 +0,0 @@
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// -----------
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// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
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// version : 0.7.1
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// timestamp : Sun Aug 7 17:43:57 2022 GMT
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// usage : riscv_ctg \
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// -- cgf // --cgf /home/anku/work2/bmanip/32/dataset.yaml \
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// --cgf /home/anku/work2/bmanip/32/rv32ib.yaml \
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\
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// -- xlen 32 \
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// -----------
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//
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// -----------
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// Copyright (c) 2020. RISC-V International. All rights reserved.
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// SPDX-License-Identifier: BSD-3-Clause
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// -----------
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//
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// This assembly file tests the sext.b instruction of the RISC-V RV32Zbb extension for the sext.b covergroup.
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//
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#include "model_test.h"
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#include "arch_test.h"
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RVTEST_ISA("RV32IZbb")
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.section .text.init
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.globl rvtest_entry_point
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rvtest_entry_point:
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RVMODEL_BOOT
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RVTEST_CODE_BEGIN
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#ifdef TEST_CASE_1
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RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zbb.*);def TEST_CASE_1=True;",sext.b)
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RVTEST_SIGBASE(x1,signature_x1_1)
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inst_0:
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// rs1 == rd, rs1==x31, rd==x31,
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// opcode: sext.b ; op1:x31; dest:x31; op1val:0x0;
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TEST_RD_OP(sext.b, x31, x31, 0x00000000, 0x0, x1, 0, x2)
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inst_1:
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// rs1 != rd, rs1==x29, rd==x30,
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// opcode: sext.b ; op1:x29; dest:x30; op1val:0x7fffffff;
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TEST_RD_OP(sext.b, x30, x29, 0x00000000, 0x7fffffff, x1, 4, x2)
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inst_2:
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// rs1==x30, rd==x29,
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// opcode: sext.b ; op1:x30; dest:x29; op1val:0xbfffffff;
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TEST_RD_OP(sext.b, x29, x30, 0x00000000, 0xbfffffff, x1, 8, x2)
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inst_3:
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// rs1==x27, rd==x28,
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// opcode: sext.b ; op1:x27; dest:x28; op1val:0xdfffffff;
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TEST_RD_OP(sext.b, x28, x27, 0x00000000, 0xdfffffff, x1, 12, x2)
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inst_4:
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// rs1==x28, rd==x27,
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// opcode: sext.b ; op1:x28; dest:x27; op1val:0xefffffff;
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TEST_RD_OP(sext.b, x27, x28, 0x00000000, 0xefffffff, x1, 16, x2)
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inst_5:
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// rs1==x25, rd==x26,
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// opcode: sext.b ; op1:x25; dest:x26; op1val:0xf7ffffff;
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TEST_RD_OP(sext.b, x26, x25, 0x00000000, 0xf7ffffff, x1, 20, x2)
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inst_6:
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// rs1==x26, rd==x25,
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// opcode: sext.b ; op1:x26; dest:x25; op1val:0xfbffffff;
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TEST_RD_OP(sext.b, x25, x26, 0x00000000, 0xfbffffff, x1, 24, x2)
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inst_7:
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// rs1==x23, rd==x24,
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// opcode: sext.b ; op1:x23; dest:x24; op1val:0xfdffffff;
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TEST_RD_OP(sext.b, x24, x23, 0x00000000, 0xfdffffff, x1, 28, x2)
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inst_8:
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// rs1==x24, rd==x23,
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// opcode: sext.b ; op1:x24; dest:x23; op1val:0xfeffffff;
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TEST_RD_OP(sext.b, x23, x24, 0x00000000, 0xfeffffff, x1, 32, x2)
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inst_9:
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// rs1==x21, rd==x22,
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// opcode: sext.b ; op1:x21; dest:x22; op1val:0xff7fffff;
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TEST_RD_OP(sext.b, x22, x21, 0x00000000, 0xff7fffff, x1, 36, x2)
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inst_10:
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// rs1==x22, rd==x21,
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// opcode: sext.b ; op1:x22; dest:x21; op1val:0xffbfffff;
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TEST_RD_OP(sext.b, x21, x22, 0x00000000, 0xffbfffff, x1, 40, x2)
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inst_11:
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// rs1==x19, rd==x20,
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// opcode: sext.b ; op1:x19; dest:x20; op1val:0xffdfffff;
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TEST_RD_OP(sext.b, x20, x19, 0x00000000, 0xffdfffff, x1, 44, x2)
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inst_12:
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// rs1==x20, rd==x19,
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// opcode: sext.b ; op1:x20; dest:x19; op1val:0xffefffff;
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TEST_RD_OP(sext.b, x19, x20, 0x00000000, 0xffefffff, x1, 48, x2)
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inst_13:
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// rs1==x17, rd==x18,
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// opcode: sext.b ; op1:x17; dest:x18; op1val:0xfff7ffff;
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TEST_RD_OP(sext.b, x18, x17, 0x00000000, 0xfff7ffff, x1, 52, x2)
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inst_14:
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// rs1==x18, rd==x17,
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// opcode: sext.b ; op1:x18; dest:x17; op1val:0xfffbffff;
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TEST_RD_OP(sext.b, x17, x18, 0x00000000, 0xfffbffff, x1, 56, x2)
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inst_15:
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// rs1==x15, rd==x16,
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// opcode: sext.b ; op1:x15; dest:x16; op1val:0xfffdffff;
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TEST_RD_OP(sext.b, x16, x15, 0x00000000, 0xfffdffff, x1, 60, x2)
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inst_16:
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// rs1==x16, rd==x15,
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// opcode: sext.b ; op1:x16; dest:x15; op1val:0xfffeffff;
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TEST_RD_OP(sext.b, x15, x16, 0x00000000, 0xfffeffff, x1, 64, x2)
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inst_17:
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// rs1==x13, rd==x14,
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// opcode: sext.b ; op1:x13; dest:x14; op1val:0xffff7fff;
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TEST_RD_OP(sext.b, x14, x13, 0x00000000, 0xffff7fff, x1, 68, x2)
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inst_18:
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// rs1==x14, rd==x13,
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// opcode: sext.b ; op1:x14; dest:x13; op1val:0xffffbfff;
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TEST_RD_OP(sext.b, x13, x14, 0x00000000, 0xffffbfff, x1, 72, x2)
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inst_19:
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// rs1==x11, rd==x12,
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// opcode: sext.b ; op1:x11; dest:x12; op1val:0xffffdfff;
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TEST_RD_OP(sext.b, x12, x11, 0x00000000, 0xffffdfff, x1, 76, x2)
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inst_20:
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// rs1==x12, rd==x11,
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// opcode: sext.b ; op1:x12; dest:x11; op1val:0xffffefff;
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TEST_RD_OP(sext.b, x11, x12, 0x00000000, 0xffffefff, x1, 80, x2)
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inst_21:
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// rs1==x9, rd==x10,
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// opcode: sext.b ; op1:x9; dest:x10; op1val:0xfffff7ff;
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TEST_RD_OP(sext.b, x10, x9, 0x00000000, 0xfffff7ff, x1, 84, x2)
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inst_22:
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// rs1==x10, rd==x9,
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// opcode: sext.b ; op1:x10; dest:x9; op1val:0xfffffbff;
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TEST_RD_OP(sext.b, x9, x10, 0x00000000, 0xfffffbff, x1, 88, x2)
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inst_23:
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// rs1==x7, rd==x8,
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// opcode: sext.b ; op1:x7; dest:x8; op1val:0xfffffdff;
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TEST_RD_OP(sext.b, x8, x7, 0x00000000, 0xfffffdff, x1, 92, x2)
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inst_24:
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// rs1==x8, rd==x7,
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// opcode: sext.b ; op1:x8; dest:x7; op1val:0xfffffeff;
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TEST_RD_OP(sext.b, x7, x8, 0x00000000, 0xfffffeff, x1, 96, x2)
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inst_25:
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// rs1==x5, rd==x6,
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// opcode: sext.b ; op1:x5; dest:x6; op1val:0xffffff7f;
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TEST_RD_OP(sext.b, x6, x5, 0x00000000, 0xffffff7f, x1, 100, x2)
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inst_26:
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// rs1==x6, rd==x5,
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// opcode: sext.b ; op1:x6; dest:x5; op1val:0xffffffbf;
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TEST_RD_OP(sext.b, x5, x6, 0x00000000, 0xffffffbf, x1, 104, x7)
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inst_27:
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// rs1==x3, rd==x4,
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// opcode: sext.b ; op1:x3; dest:x4; op1val:0xffffffdf;
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TEST_RD_OP(sext.b, x4, x3, 0x00000000, 0xffffffdf, x1, 108, x7)
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RVTEST_SIGBASE(x5,signature_x5_0)
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inst_28:
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// rs1==x4, rd==x3,
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// opcode: sext.b ; op1:x4; dest:x3; op1val:0xffffffef;
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TEST_RD_OP(sext.b, x3, x4, 0x00000000, 0xffffffef, x5, 0, x7)
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inst_29:
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// rs1==x1, rd==x2,
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// opcode: sext.b ; op1:x1; dest:x2; op1val:0xfffffff7;
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TEST_RD_OP(sext.b, x2, x1, 0x00000000, 0xfffffff7, x5, 4, x7)
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inst_30:
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// rs1==x2, rd==x1,
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// opcode: sext.b ; op1:x2; dest:x1; op1val:0xfffffffb;
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TEST_RD_OP(sext.b, x1, x2, 0x00000000, 0xfffffffb, x5, 8, x7)
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inst_31:
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// rs1==x0,
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// opcode: sext.b ; op1:x0; dest:x31; op1val:0x0;
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TEST_RD_OP(sext.b, x31, x0, 0x00000000, 0x0, x5, 12, x7)
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inst_32:
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// rd==x0,
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// opcode: sext.b ; op1:x31; dest:x0; op1val:0xfffffffe;
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TEST_RD_OP(sext.b, x0, x31, 0x00000000, 0xfffffffe, x5, 16, x7)
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inst_33:
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//
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// opcode: sext.b ; op1:x30; dest:x31; op1val:0x80000000;
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TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x80000000, x5, 20, x7)
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inst_34:
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//
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// opcode: sext.b ; op1:x30; dest:x31; op1val:0x40000000;
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TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x40000000, x5, 24, x7)
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inst_35:
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//
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// opcode: sext.b ; op1:x30; dest:x31; op1val:0x20000000;
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TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x20000000, x5, 28, x7)
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inst_36:
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//
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// opcode: sext.b ; op1:x30; dest:x31; op1val:0x10000000;
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TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x10000000, x5, 32, x7)
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inst_37:
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//
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// opcode: sext.b ; op1:x30; dest:x31; op1val:0x8000000;
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TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x8000000, x5, 36, x7)
|
||||
|
||||
inst_38:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x4000000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x4000000, x5, 40, x7)
|
||||
|
||||
inst_39:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x2000000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x2000000, x5, 44, x7)
|
||||
|
||||
inst_40:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x1000000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x1000000, x5, 48, x7)
|
||||
|
||||
inst_41:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x800000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x800000, x5, 52, x7)
|
||||
|
||||
inst_42:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x400000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x400000, x5, 56, x7)
|
||||
|
||||
inst_43:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x200000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x200000, x5, 60, x7)
|
||||
|
||||
inst_44:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x100000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x100000, x5, 64, x7)
|
||||
|
||||
inst_45:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x80000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x80000, x5, 68, x7)
|
||||
|
||||
inst_46:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x40000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x40000, x5, 72, x7)
|
||||
|
||||
inst_47:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x20000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x20000, x5, 76, x7)
|
||||
|
||||
inst_48:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x10000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x10000, x5, 80, x7)
|
||||
|
||||
inst_49:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x8000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x8000, x5, 84, x7)
|
||||
|
||||
inst_50:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x4000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x4000, x5, 88, x7)
|
||||
|
||||
inst_51:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x2000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x2000, x5, 92, x7)
|
||||
|
||||
inst_52:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x1000;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x1000, x5, 96, x7)
|
||||
|
||||
inst_53:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x800;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x800, x5, 100, x7)
|
||||
|
||||
inst_54:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x1;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x1, x5, 104, x7)
|
||||
|
||||
inst_55:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x3150e5fa;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x3150e5fa, x5, 108, x7)
|
||||
|
||||
inst_56:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x90efb625;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x90efb625, x5, 112, x7)
|
||||
|
||||
inst_57:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x65408c73;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x65408c73, x5, 116, x7)
|
||||
|
||||
inst_58:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x1fc493ca;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x1fc493ca, x5, 120, x7)
|
||||
|
||||
inst_59:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xd169a3f8;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xd169a3f8, x5, 124, x7)
|
||||
|
||||
inst_60:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x8e2eac2a;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x8e2eac2a, x5, 128, x7)
|
||||
|
||||
inst_61:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xf4c30307;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xf4c30307, x5, 132, x7)
|
||||
|
||||
inst_62:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x35f9377f;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x35f9377f, x5, 136, x7)
|
||||
|
||||
inst_63:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xa0569d76;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xa0569d76, x5, 140, x7)
|
||||
|
||||
inst_64:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x58d548aa;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x58d548aa, x5, 144, x7)
|
||||
|
||||
inst_65:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x2daf9ac7;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x2daf9ac7, x5, 148, x7)
|
||||
|
||||
inst_66:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x55d98c6e;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x55d98c6e, x5, 152, x7)
|
||||
|
||||
inst_67:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xf273b44c;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xf273b44c, x5, 156, x7)
|
||||
|
||||
inst_68:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x74b8de87;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x74b8de87, x5, 160, x7)
|
||||
|
||||
inst_69:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x886c3a30;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x886c3a30, x5, 164, x7)
|
||||
|
||||
inst_70:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xccce240c;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xccce240c, x5, 168, x7)
|
||||
|
||||
inst_71:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xbb61a9cd;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xbb61a9cd, x5, 172, x7)
|
||||
|
||||
inst_72:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xb49c83dc;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xb49c83dc, x5, 176, x7)
|
||||
|
||||
inst_73:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xc5521660;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xc5521660, x5, 180, x7)
|
||||
|
||||
inst_74:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x254a9493;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x254a9493, x5, 184, x7)
|
||||
|
||||
inst_75:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x400;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x400, x5, 188, x7)
|
||||
|
||||
inst_76:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x200;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x200, x5, 192, x7)
|
||||
|
||||
inst_77:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x100;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x100, x5, 196, x7)
|
||||
|
||||
inst_78:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x80;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x80, x5, 200, x7)
|
||||
|
||||
inst_79:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x40;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x40, x5, 204, x7)
|
||||
|
||||
inst_80:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x20;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x20, x5, 208, x7)
|
||||
|
||||
inst_81:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x10;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x10, x5, 212, x7)
|
||||
|
||||
inst_82:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x8;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x8, x5, 216, x7)
|
||||
|
||||
inst_83:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x4;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x4, x5, 220, x7)
|
||||
|
||||
inst_84:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0x2;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0x2, x5, 224, x7)
|
||||
|
||||
inst_85:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xfffffffd;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xfffffffd, x5, 228, x7)
|
||||
|
||||
inst_86:
|
||||
//
|
||||
// opcode: sext.b ; op1:x30; dest:x31; op1val:0xfffffffe;
|
||||
TEST_RD_OP(sext.b, x31, x30, 0x00000000, 0xfffffffe, x5, 232, x7)
|
||||
#endif
|
||||
|
||||
|
||||
RVTEST_CODE_END
|
||||
RVMODEL_HALT
|
||||
|
||||
RVTEST_DATA_BEGIN
|
||||
.align 4
|
||||
rvtest_data:
|
||||
.word 0xbabecafe
|
||||
.word 0xabecafeb
|
||||
.word 0xbecafeba
|
||||
.word 0xecafebab
|
||||
RVTEST_DATA_END
|
||||
|
||||
RVMODEL_DATA_BEGIN
|
||||
rvtest_sig_begin:
|
||||
sig_begin_canary:
|
||||
CANARY;
|
||||
|
||||
|
||||
signature_x1_0:
|
||||
.fill 0*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
|
||||
signature_x1_1:
|
||||
.fill 28*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
|
||||
signature_x5_0:
|
||||
.fill 59*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
#ifdef rvtest_mtrap_routine
|
||||
|
||||
tsig_begin_canary:
|
||||
CANARY;
|
||||
mtrap_sigptr:
|
||||
.fill 64*(XLEN/32),4,0xdeadbeef
|
||||
tsig_end_canary:
|
||||
CANARY;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef rvtest_gpr_save
|
||||
|
||||
gpr_save:
|
||||
.fill 32*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
#endif
|
||||
|
||||
sig_end_canary:
|
||||
CANARY;
|
||||
rvtest_sig_end:
|
||||
RVMODEL_DATA_END
|
||||
|
|
@ -1,529 +0,0 @@
|
|||
|
||||
// -----------
|
||||
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
|
||||
// version : 0.7.1
|
||||
// timestamp : Sun Aug 7 17:43:57 2022 GMT
|
||||
// usage : riscv_ctg \
|
||||
// -- cgf // --cgf /home/anku/work2/bmanip/32/dataset.yaml \
|
||||
// --cgf /home/anku/work2/bmanip/32/rv32ib.yaml \
|
||||
\
|
||||
// -- xlen 32 \
|
||||
// -----------
|
||||
//
|
||||
// -----------
|
||||
// Copyright (c) 2020. RISC-V International. All rights reserved.
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
// -----------
|
||||
//
|
||||
// This assembly file tests the sext.h instruction of the RISC-V RV32Zbb extension for the sext.h covergroup.
|
||||
//
|
||||
#include "model_test.h"
|
||||
#include "arch_test.h"
|
||||
RVTEST_ISA("RV32IZbb")
|
||||
|
||||
.section .text.init
|
||||
.globl rvtest_entry_point
|
||||
rvtest_entry_point:
|
||||
RVMODEL_BOOT
|
||||
RVTEST_CODE_BEGIN
|
||||
|
||||
#ifdef TEST_CASE_1
|
||||
|
||||
RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zbb.*);def TEST_CASE_1=True;",sext.h)
|
||||
|
||||
RVTEST_SIGBASE(x1,signature_x1_1)
|
||||
|
||||
inst_0:
|
||||
// rs1 == rd, rs1==x31, rd==x31,
|
||||
// opcode: sext.h ; op1:x31; dest:x31; op1val:0x0;
|
||||
TEST_RD_OP(sext.h, x31, x31, 0x00000000, 0x0, x1, 0, x2)
|
||||
|
||||
inst_1:
|
||||
// rs1 != rd, rs1==x29, rd==x30,
|
||||
// opcode: sext.h ; op1:x29; dest:x30; op1val:0x7fffffff;
|
||||
TEST_RD_OP(sext.h, x30, x29, 0x00000000, 0x7fffffff, x1, 4, x2)
|
||||
|
||||
inst_2:
|
||||
// rs1==x30, rd==x29,
|
||||
// opcode: sext.h ; op1:x30; dest:x29; op1val:0xbfffffff;
|
||||
TEST_RD_OP(sext.h, x29, x30, 0x00000000, 0xbfffffff, x1, 8, x2)
|
||||
|
||||
inst_3:
|
||||
// rs1==x27, rd==x28,
|
||||
// opcode: sext.h ; op1:x27; dest:x28; op1val:0xdfffffff;
|
||||
TEST_RD_OP(sext.h, x28, x27, 0x00000000, 0xdfffffff, x1, 12, x2)
|
||||
|
||||
inst_4:
|
||||
// rs1==x28, rd==x27,
|
||||
// opcode: sext.h ; op1:x28; dest:x27; op1val:0xefffffff;
|
||||
TEST_RD_OP(sext.h, x27, x28, 0x00000000, 0xefffffff, x1, 16, x2)
|
||||
|
||||
inst_5:
|
||||
// rs1==x25, rd==x26,
|
||||
// opcode: sext.h ; op1:x25; dest:x26; op1val:0xf7ffffff;
|
||||
TEST_RD_OP(sext.h, x26, x25, 0x00000000, 0xf7ffffff, x1, 20, x2)
|
||||
|
||||
inst_6:
|
||||
// rs1==x26, rd==x25,
|
||||
// opcode: sext.h ; op1:x26; dest:x25; op1val:0xfbffffff;
|
||||
TEST_RD_OP(sext.h, x25, x26, 0x00000000, 0xfbffffff, x1, 24, x2)
|
||||
|
||||
inst_7:
|
||||
// rs1==x23, rd==x24,
|
||||
// opcode: sext.h ; op1:x23; dest:x24; op1val:0xfdffffff;
|
||||
TEST_RD_OP(sext.h, x24, x23, 0x00000000, 0xfdffffff, x1, 28, x2)
|
||||
|
||||
inst_8:
|
||||
// rs1==x24, rd==x23,
|
||||
// opcode: sext.h ; op1:x24; dest:x23; op1val:0xfeffffff;
|
||||
TEST_RD_OP(sext.h, x23, x24, 0x00000000, 0xfeffffff, x1, 32, x2)
|
||||
|
||||
inst_9:
|
||||
// rs1==x21, rd==x22,
|
||||
// opcode: sext.h ; op1:x21; dest:x22; op1val:0xff7fffff;
|
||||
TEST_RD_OP(sext.h, x22, x21, 0x00000000, 0xff7fffff, x1, 36, x2)
|
||||
|
||||
inst_10:
|
||||
// rs1==x22, rd==x21,
|
||||
// opcode: sext.h ; op1:x22; dest:x21; op1val:0xffbfffff;
|
||||
TEST_RD_OP(sext.h, x21, x22, 0x00000000, 0xffbfffff, x1, 40, x2)
|
||||
|
||||
inst_11:
|
||||
// rs1==x19, rd==x20,
|
||||
// opcode: sext.h ; op1:x19; dest:x20; op1val:0xffdfffff;
|
||||
TEST_RD_OP(sext.h, x20, x19, 0x00000000, 0xffdfffff, x1, 44, x2)
|
||||
|
||||
inst_12:
|
||||
// rs1==x20, rd==x19,
|
||||
// opcode: sext.h ; op1:x20; dest:x19; op1val:0xffefffff;
|
||||
TEST_RD_OP(sext.h, x19, x20, 0x00000000, 0xffefffff, x1, 48, x2)
|
||||
|
||||
inst_13:
|
||||
// rs1==x17, rd==x18,
|
||||
// opcode: sext.h ; op1:x17; dest:x18; op1val:0xfff7ffff;
|
||||
TEST_RD_OP(sext.h, x18, x17, 0x00000000, 0xfff7ffff, x1, 52, x2)
|
||||
|
||||
inst_14:
|
||||
// rs1==x18, rd==x17,
|
||||
// opcode: sext.h ; op1:x18; dest:x17; op1val:0xfffbffff;
|
||||
TEST_RD_OP(sext.h, x17, x18, 0x00000000, 0xfffbffff, x1, 56, x2)
|
||||
|
||||
inst_15:
|
||||
// rs1==x15, rd==x16,
|
||||
// opcode: sext.h ; op1:x15; dest:x16; op1val:0xfffdffff;
|
||||
TEST_RD_OP(sext.h, x16, x15, 0x00000000, 0xfffdffff, x1, 60, x2)
|
||||
|
||||
inst_16:
|
||||
// rs1==x16, rd==x15,
|
||||
// opcode: sext.h ; op1:x16; dest:x15; op1val:0xfffeffff;
|
||||
TEST_RD_OP(sext.h, x15, x16, 0x00000000, 0xfffeffff, x1, 64, x2)
|
||||
|
||||
inst_17:
|
||||
// rs1==x13, rd==x14,
|
||||
// opcode: sext.h ; op1:x13; dest:x14; op1val:0xffff7fff;
|
||||
TEST_RD_OP(sext.h, x14, x13, 0x00000000, 0xffff7fff, x1, 68, x2)
|
||||
|
||||
inst_18:
|
||||
// rs1==x14, rd==x13,
|
||||
// opcode: sext.h ; op1:x14; dest:x13; op1val:0xffffbfff;
|
||||
TEST_RD_OP(sext.h, x13, x14, 0x00000000, 0xffffbfff, x1, 72, x2)
|
||||
|
||||
inst_19:
|
||||
// rs1==x11, rd==x12,
|
||||
// opcode: sext.h ; op1:x11; dest:x12; op1val:0xffffdfff;
|
||||
TEST_RD_OP(sext.h, x12, x11, 0x00000000, 0xffffdfff, x1, 76, x2)
|
||||
|
||||
inst_20:
|
||||
// rs1==x12, rd==x11,
|
||||
// opcode: sext.h ; op1:x12; dest:x11; op1val:0xffffefff;
|
||||
TEST_RD_OP(sext.h, x11, x12, 0x00000000, 0xffffefff, x1, 80, x2)
|
||||
|
||||
inst_21:
|
||||
// rs1==x9, rd==x10,
|
||||
// opcode: sext.h ; op1:x9; dest:x10; op1val:0xfffff7ff;
|
||||
TEST_RD_OP(sext.h, x10, x9, 0x00000000, 0xfffff7ff, x1, 84, x2)
|
||||
|
||||
inst_22:
|
||||
// rs1==x10, rd==x9,
|
||||
// opcode: sext.h ; op1:x10; dest:x9; op1val:0xfffffbff;
|
||||
TEST_RD_OP(sext.h, x9, x10, 0x00000000, 0xfffffbff, x1, 88, x2)
|
||||
|
||||
inst_23:
|
||||
// rs1==x7, rd==x8,
|
||||
// opcode: sext.h ; op1:x7; dest:x8; op1val:0xfffffdff;
|
||||
TEST_RD_OP(sext.h, x8, x7, 0x00000000, 0xfffffdff, x1, 92, x2)
|
||||
|
||||
inst_24:
|
||||
// rs1==x8, rd==x7,
|
||||
// opcode: sext.h ; op1:x8; dest:x7; op1val:0xfffffeff;
|
||||
TEST_RD_OP(sext.h, x7, x8, 0x00000000, 0xfffffeff, x1, 96, x2)
|
||||
|
||||
inst_25:
|
||||
// rs1==x5, rd==x6,
|
||||
// opcode: sext.h ; op1:x5; dest:x6; op1val:0xffffff7f;
|
||||
TEST_RD_OP(sext.h, x6, x5, 0x00000000, 0xffffff7f, x1, 100, x2)
|
||||
|
||||
inst_26:
|
||||
// rs1==x6, rd==x5,
|
||||
// opcode: sext.h ; op1:x6; dest:x5; op1val:0xffffffbf;
|
||||
TEST_RD_OP(sext.h, x5, x6, 0x00000000, 0xffffffbf, x1, 104, x7)
|
||||
|
||||
inst_27:
|
||||
// rs1==x3, rd==x4,
|
||||
// opcode: sext.h ; op1:x3; dest:x4; op1val:0xffffffdf;
|
||||
TEST_RD_OP(sext.h, x4, x3, 0x00000000, 0xffffffdf, x1, 108, x7)
|
||||
RVTEST_SIGBASE(x5,signature_x5_0)
|
||||
|
||||
inst_28:
|
||||
// rs1==x4, rd==x3,
|
||||
// opcode: sext.h ; op1:x4; dest:x3; op1val:0xffffffef;
|
||||
TEST_RD_OP(sext.h, x3, x4, 0x00000000, 0xffffffef, x5, 0, x7)
|
||||
|
||||
inst_29:
|
||||
// rs1==x1, rd==x2,
|
||||
// opcode: sext.h ; op1:x1; dest:x2; op1val:0xfffffff7;
|
||||
TEST_RD_OP(sext.h, x2, x1, 0x00000000, 0xfffffff7, x5, 4, x7)
|
||||
|
||||
inst_30:
|
||||
// rs1==x2, rd==x1,
|
||||
// opcode: sext.h ; op1:x2; dest:x1; op1val:0xfffffffb;
|
||||
TEST_RD_OP(sext.h, x1, x2, 0x00000000, 0xfffffffb, x5, 8, x7)
|
||||
|
||||
inst_31:
|
||||
// rs1==x0,
|
||||
// opcode: sext.h ; op1:x0; dest:x31; op1val:0x0;
|
||||
TEST_RD_OP(sext.h, x31, x0, 0x00000000, 0x0, x5, 12, x7)
|
||||
|
||||
inst_32:
|
||||
// rd==x0,
|
||||
// opcode: sext.h ; op1:x31; dest:x0; op1val:0xfffffffe;
|
||||
TEST_RD_OP(sext.h, x0, x31, 0x00000000, 0xfffffffe, x5, 16, x7)
|
||||
|
||||
inst_33:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x80000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x80000000, x5, 20, x7)
|
||||
|
||||
inst_34:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x40000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x40000000, x5, 24, x7)
|
||||
|
||||
inst_35:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x20000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x20000000, x5, 28, x7)
|
||||
|
||||
inst_36:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x10000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x10000000, x5, 32, x7)
|
||||
|
||||
inst_37:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x8000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x8000000, x5, 36, x7)
|
||||
|
||||
inst_38:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x4000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x4000000, x5, 40, x7)
|
||||
|
||||
inst_39:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x2000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x2000000, x5, 44, x7)
|
||||
|
||||
inst_40:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x1000000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x1000000, x5, 48, x7)
|
||||
|
||||
inst_41:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x800000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x800000, x5, 52, x7)
|
||||
|
||||
inst_42:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x400000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x400000, x5, 56, x7)
|
||||
|
||||
inst_43:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x200000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x200000, x5, 60, x7)
|
||||
|
||||
inst_44:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x100000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x100000, x5, 64, x7)
|
||||
|
||||
inst_45:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x80000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x80000, x5, 68, x7)
|
||||
|
||||
inst_46:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x40000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x40000, x5, 72, x7)
|
||||
|
||||
inst_47:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x20000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x20000, x5, 76, x7)
|
||||
|
||||
inst_48:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x10000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x10000, x5, 80, x7)
|
||||
|
||||
inst_49:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x8000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x8000, x5, 84, x7)
|
||||
|
||||
inst_50:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x4000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x4000, x5, 88, x7)
|
||||
|
||||
inst_51:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x2000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x2000, x5, 92, x7)
|
||||
|
||||
inst_52:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x1000;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x1000, x5, 96, x7)
|
||||
|
||||
inst_53:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x800;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x800, x5, 100, x7)
|
||||
|
||||
inst_54:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x400;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x400, x5, 104, x7)
|
||||
|
||||
inst_55:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x200;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x200, x5, 108, x7)
|
||||
|
||||
inst_56:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x1;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x1, x5, 112, x7)
|
||||
|
||||
inst_57:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x3150e5fa;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x3150e5fa, x5, 116, x7)
|
||||
|
||||
inst_58:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x90efb625;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x90efb625, x5, 120, x7)
|
||||
|
||||
inst_59:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x65408c73;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x65408c73, x5, 124, x7)
|
||||
|
||||
inst_60:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x1fc493ca;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x1fc493ca, x5, 128, x7)
|
||||
|
||||
inst_61:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xd169a3f8;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xd169a3f8, x5, 132, x7)
|
||||
|
||||
inst_62:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x8e2eac2a;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x8e2eac2a, x5, 136, x7)
|
||||
|
||||
inst_63:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xf4c30307;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xf4c30307, x5, 140, x7)
|
||||
|
||||
inst_64:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x35f9377f;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x35f9377f, x5, 144, x7)
|
||||
|
||||
inst_65:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xa0569d76;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xa0569d76, x5, 148, x7)
|
||||
|
||||
inst_66:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x58d548aa;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x58d548aa, x5, 152, x7)
|
||||
|
||||
inst_67:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x2daf9ac7;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x2daf9ac7, x5, 156, x7)
|
||||
|
||||
inst_68:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x55d98c6e;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x55d98c6e, x5, 160, x7)
|
||||
|
||||
inst_69:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xf273b44c;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xf273b44c, x5, 164, x7)
|
||||
|
||||
inst_70:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x74b8de87;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x74b8de87, x5, 168, x7)
|
||||
|
||||
inst_71:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x886c3a30;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x886c3a30, x5, 172, x7)
|
||||
|
||||
inst_72:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xccce240c;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xccce240c, x5, 176, x7)
|
||||
|
||||
inst_73:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xbb61a9cd;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xbb61a9cd, x5, 180, x7)
|
||||
|
||||
inst_74:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xb49c83dc;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xb49c83dc, x5, 184, x7)
|
||||
|
||||
inst_75:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xc5521660;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xc5521660, x5, 188, x7)
|
||||
|
||||
inst_76:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x254a9493;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x254a9493, x5, 192, x7)
|
||||
|
||||
inst_77:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x80;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x80, x5, 196, x7)
|
||||
|
||||
inst_78:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xff80;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xff80, x5, 200, x7)
|
||||
|
||||
inst_79:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x100;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x100, x5, 204, x7)
|
||||
|
||||
inst_80:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x40;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x40, x5, 208, x7)
|
||||
|
||||
inst_81:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x20;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x20, x5, 212, x7)
|
||||
|
||||
inst_82:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x10;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x10, x5, 216, x7)
|
||||
|
||||
inst_83:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x8;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x8, x5, 220, x7)
|
||||
|
||||
inst_84:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x4;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x4, x5, 224, x7)
|
||||
|
||||
inst_85:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0x2;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0x2, x5, 228, x7)
|
||||
|
||||
inst_86:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xfffffffd;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xfffffffd, x5, 232, x7)
|
||||
|
||||
inst_87:
|
||||
//
|
||||
// opcode: sext.h ; op1:x30; dest:x31; op1val:0xfffffffe;
|
||||
TEST_RD_OP(sext.h, x31, x30, 0x00000000, 0xfffffffe, x5, 236, x7)
|
||||
#endif
|
||||
|
||||
|
||||
RVTEST_CODE_END
|
||||
RVMODEL_HALT
|
||||
|
||||
RVTEST_DATA_BEGIN
|
||||
.align 4
|
||||
rvtest_data:
|
||||
.word 0xbabecafe
|
||||
.word 0xabecafeb
|
||||
.word 0xbecafeba
|
||||
.word 0xecafebab
|
||||
RVTEST_DATA_END
|
||||
|
||||
RVMODEL_DATA_BEGIN
|
||||
rvtest_sig_begin:
|
||||
sig_begin_canary:
|
||||
CANARY;
|
||||
|
||||
|
||||
signature_x1_0:
|
||||
.fill 0*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
|
||||
signature_x1_1:
|
||||
.fill 28*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
|
||||
signature_x5_0:
|
||||
.fill 60*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
#ifdef rvtest_mtrap_routine
|
||||
|
||||
tsig_begin_canary:
|
||||
CANARY;
|
||||
mtrap_sigptr:
|
||||
.fill 64*(XLEN/32),4,0xdeadbeef
|
||||
tsig_end_canary:
|
||||
CANARY;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef rvtest_gpr_save
|
||||
|
||||
gpr_save:
|
||||
.fill 32*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
#endif
|
||||
|
||||
sig_end_canary:
|
||||
CANARY;
|
||||
rvtest_sig_end:
|
||||
RVMODEL_DATA_END
|
||||
|
|
@ -1,529 +0,0 @@
|
|||
|
||||
// -----------
|
||||
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
|
||||
// version : 0.7.1
|
||||
// timestamp : Sun Aug 7 17:43:57 2022 GMT
|
||||
// usage : riscv_ctg \
|
||||
// -- cgf // --cgf /home/anku/work2/bmanip/32/dataset.yaml \
|
||||
// --cgf /home/anku/work2/bmanip/32/rv32ib.yaml \
|
||||
\
|
||||
// -- xlen 32 \
|
||||
// -----------
|
||||
//
|
||||
// -----------
|
||||
// Copyright (c) 2020. RISC-V International. All rights reserved.
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
// -----------
|
||||
//
|
||||
// This assembly file tests the zext.h instruction of the RISC-V RV32Zbb extension for the zext.h_32 covergroup.
|
||||
//
|
||||
#include "model_test.h"
|
||||
#include "arch_test.h"
|
||||
RVTEST_ISA("RV32IZbb")
|
||||
|
||||
.section .text.init
|
||||
.globl rvtest_entry_point
|
||||
rvtest_entry_point:
|
||||
RVMODEL_BOOT
|
||||
RVTEST_CODE_BEGIN
|
||||
|
||||
#ifdef TEST_CASE_1
|
||||
|
||||
RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*Zbb.*);def TEST_CASE_1=True;",zext.h_32)
|
||||
|
||||
RVTEST_SIGBASE(x1,signature_x1_1)
|
||||
|
||||
inst_0:
|
||||
// rs1 == rd, rs1==x31, rd==x31,
|
||||
// opcode: zext.h ; op1:x31; dest:x31; op1val:0x0;
|
||||
TEST_RD_OP(zext.h, x31, x31, 0x00000000, 0x0, x1, 0, x2)
|
||||
|
||||
inst_1:
|
||||
// rs1 != rd, rs1==x29, rd==x30,
|
||||
// opcode: zext.h ; op1:x29; dest:x30; op1val:0x7fffffff;
|
||||
TEST_RD_OP(zext.h, x30, x29, 0x00000000, 0x7fffffff, x1, 4, x2)
|
||||
|
||||
inst_2:
|
||||
// rs1==x30, rd==x29,
|
||||
// opcode: zext.h ; op1:x30; dest:x29; op1val:0xbfffffff;
|
||||
TEST_RD_OP(zext.h, x29, x30, 0x00000000, 0xbfffffff, x1, 8, x2)
|
||||
|
||||
inst_3:
|
||||
// rs1==x27, rd==x28,
|
||||
// opcode: zext.h ; op1:x27; dest:x28; op1val:0xdfffffff;
|
||||
TEST_RD_OP(zext.h, x28, x27, 0x00000000, 0xdfffffff, x1, 12, x2)
|
||||
|
||||
inst_4:
|
||||
// rs1==x28, rd==x27,
|
||||
// opcode: zext.h ; op1:x28; dest:x27; op1val:0xefffffff;
|
||||
TEST_RD_OP(zext.h, x27, x28, 0x00000000, 0xefffffff, x1, 16, x2)
|
||||
|
||||
inst_5:
|
||||
// rs1==x25, rd==x26,
|
||||
// opcode: zext.h ; op1:x25; dest:x26; op1val:0xf7ffffff;
|
||||
TEST_RD_OP(zext.h, x26, x25, 0x00000000, 0xf7ffffff, x1, 20, x2)
|
||||
|
||||
inst_6:
|
||||
// rs1==x26, rd==x25,
|
||||
// opcode: zext.h ; op1:x26; dest:x25; op1val:0xfbffffff;
|
||||
TEST_RD_OP(zext.h, x25, x26, 0x00000000, 0xfbffffff, x1, 24, x2)
|
||||
|
||||
inst_7:
|
||||
// rs1==x23, rd==x24,
|
||||
// opcode: zext.h ; op1:x23; dest:x24; op1val:0xfdffffff;
|
||||
TEST_RD_OP(zext.h, x24, x23, 0x00000000, 0xfdffffff, x1, 28, x2)
|
||||
|
||||
inst_8:
|
||||
// rs1==x24, rd==x23,
|
||||
// opcode: zext.h ; op1:x24; dest:x23; op1val:0xfeffffff;
|
||||
TEST_RD_OP(zext.h, x23, x24, 0x00000000, 0xfeffffff, x1, 32, x2)
|
||||
|
||||
inst_9:
|
||||
// rs1==x21, rd==x22,
|
||||
// opcode: zext.h ; op1:x21; dest:x22; op1val:0xff7fffff;
|
||||
TEST_RD_OP(zext.h, x22, x21, 0x00000000, 0xff7fffff, x1, 36, x2)
|
||||
|
||||
inst_10:
|
||||
// rs1==x22, rd==x21,
|
||||
// opcode: zext.h ; op1:x22; dest:x21; op1val:0xffbfffff;
|
||||
TEST_RD_OP(zext.h, x21, x22, 0x00000000, 0xffbfffff, x1, 40, x2)
|
||||
|
||||
inst_11:
|
||||
// rs1==x19, rd==x20,
|
||||
// opcode: zext.h ; op1:x19; dest:x20; op1val:0xffdfffff;
|
||||
TEST_RD_OP(zext.h, x20, x19, 0x00000000, 0xffdfffff, x1, 44, x2)
|
||||
|
||||
inst_12:
|
||||
// rs1==x20, rd==x19,
|
||||
// opcode: zext.h ; op1:x20; dest:x19; op1val:0xffefffff;
|
||||
TEST_RD_OP(zext.h, x19, x20, 0x00000000, 0xffefffff, x1, 48, x2)
|
||||
|
||||
inst_13:
|
||||
// rs1==x17, rd==x18,
|
||||
// opcode: zext.h ; op1:x17; dest:x18; op1val:0xfff7ffff;
|
||||
TEST_RD_OP(zext.h, x18, x17, 0x00000000, 0xfff7ffff, x1, 52, x2)
|
||||
|
||||
inst_14:
|
||||
// rs1==x18, rd==x17,
|
||||
// opcode: zext.h ; op1:x18; dest:x17; op1val:0xfffbffff;
|
||||
TEST_RD_OP(zext.h, x17, x18, 0x00000000, 0xfffbffff, x1, 56, x2)
|
||||
|
||||
inst_15:
|
||||
// rs1==x15, rd==x16,
|
||||
// opcode: zext.h ; op1:x15; dest:x16; op1val:0xfffdffff;
|
||||
TEST_RD_OP(zext.h, x16, x15, 0x00000000, 0xfffdffff, x1, 60, x2)
|
||||
|
||||
inst_16:
|
||||
// rs1==x16, rd==x15,
|
||||
// opcode: zext.h ; op1:x16; dest:x15; op1val:0xfffeffff;
|
||||
TEST_RD_OP(zext.h, x15, x16, 0x00000000, 0xfffeffff, x1, 64, x2)
|
||||
|
||||
inst_17:
|
||||
// rs1==x13, rd==x14,
|
||||
// opcode: zext.h ; op1:x13; dest:x14; op1val:0xffff7fff;
|
||||
TEST_RD_OP(zext.h, x14, x13, 0x00000000, 0xffff7fff, x1, 68, x2)
|
||||
|
||||
inst_18:
|
||||
// rs1==x14, rd==x13,
|
||||
// opcode: zext.h ; op1:x14; dest:x13; op1val:0xffffbfff;
|
||||
TEST_RD_OP(zext.h, x13, x14, 0x00000000, 0xffffbfff, x1, 72, x2)
|
||||
|
||||
inst_19:
|
||||
// rs1==x11, rd==x12,
|
||||
// opcode: zext.h ; op1:x11; dest:x12; op1val:0xffffdfff;
|
||||
TEST_RD_OP(zext.h, x12, x11, 0x00000000, 0xffffdfff, x1, 76, x2)
|
||||
|
||||
inst_20:
|
||||
// rs1==x12, rd==x11,
|
||||
// opcode: zext.h ; op1:x12; dest:x11; op1val:0xffffefff;
|
||||
TEST_RD_OP(zext.h, x11, x12, 0x00000000, 0xffffefff, x1, 80, x2)
|
||||
|
||||
inst_21:
|
||||
// rs1==x9, rd==x10,
|
||||
// opcode: zext.h ; op1:x9; dest:x10; op1val:0xfffff7ff;
|
||||
TEST_RD_OP(zext.h, x10, x9, 0x00000000, 0xfffff7ff, x1, 84, x2)
|
||||
|
||||
inst_22:
|
||||
// rs1==x10, rd==x9,
|
||||
// opcode: zext.h ; op1:x10; dest:x9; op1val:0xfffffbff;
|
||||
TEST_RD_OP(zext.h, x9, x10, 0x00000000, 0xfffffbff, x1, 88, x2)
|
||||
|
||||
inst_23:
|
||||
// rs1==x7, rd==x8,
|
||||
// opcode: zext.h ; op1:x7; dest:x8; op1val:0xfffffdff;
|
||||
TEST_RD_OP(zext.h, x8, x7, 0x00000000, 0xfffffdff, x1, 92, x2)
|
||||
|
||||
inst_24:
|
||||
// rs1==x8, rd==x7,
|
||||
// opcode: zext.h ; op1:x8; dest:x7; op1val:0xfffffeff;
|
||||
TEST_RD_OP(zext.h, x7, x8, 0x00000000, 0xfffffeff, x1, 96, x2)
|
||||
|
||||
inst_25:
|
||||
// rs1==x5, rd==x6,
|
||||
// opcode: zext.h ; op1:x5; dest:x6; op1val:0xffffff7f;
|
||||
TEST_RD_OP(zext.h, x6, x5, 0x00000000, 0xffffff7f, x1, 100, x2)
|
||||
|
||||
inst_26:
|
||||
// rs1==x6, rd==x5,
|
||||
// opcode: zext.h ; op1:x6; dest:x5; op1val:0xffffffbf;
|
||||
TEST_RD_OP(zext.h, x5, x6, 0x00000000, 0xffffffbf, x1, 104, x7)
|
||||
|
||||
inst_27:
|
||||
// rs1==x3, rd==x4,
|
||||
// opcode: zext.h ; op1:x3; dest:x4; op1val:0xffffffdf;
|
||||
TEST_RD_OP(zext.h, x4, x3, 0x00000000, 0xffffffdf, x1, 108, x7)
|
||||
RVTEST_SIGBASE(x5,signature_x5_0)
|
||||
|
||||
inst_28:
|
||||
// rs1==x4, rd==x3,
|
||||
// opcode: zext.h ; op1:x4; dest:x3; op1val:0xffffffef;
|
||||
TEST_RD_OP(zext.h, x3, x4, 0x00000000, 0xffffffef, x5, 0, x7)
|
||||
|
||||
inst_29:
|
||||
// rs1==x1, rd==x2,
|
||||
// opcode: zext.h ; op1:x1; dest:x2; op1val:0xfffffff7;
|
||||
TEST_RD_OP(zext.h, x2, x1, 0x00000000, 0xfffffff7, x5, 4, x7)
|
||||
|
||||
inst_30:
|
||||
// rs1==x2, rd==x1,
|
||||
// opcode: zext.h ; op1:x2; dest:x1; op1val:0xfffffffb;
|
||||
TEST_RD_OP(zext.h, x1, x2, 0x00000000, 0xfffffffb, x5, 8, x7)
|
||||
|
||||
inst_31:
|
||||
// rs1==x0,
|
||||
// opcode: zext.h ; op1:x0; dest:x31; op1val:0x0;
|
||||
TEST_RD_OP(zext.h, x31, x0, 0x00000000, 0x0, x5, 12, x7)
|
||||
|
||||
inst_32:
|
||||
// rd==x0,
|
||||
// opcode: zext.h ; op1:x31; dest:x0; op1val:0xfffffffe;
|
||||
TEST_RD_OP(zext.h, x0, x31, 0x00000000, 0xfffffffe, x5, 16, x7)
|
||||
|
||||
inst_33:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x80000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x80000000, x5, 20, x7)
|
||||
|
||||
inst_34:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x40000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x40000000, x5, 24, x7)
|
||||
|
||||
inst_35:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x20000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x20000000, x5, 28, x7)
|
||||
|
||||
inst_36:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x10000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x10000000, x5, 32, x7)
|
||||
|
||||
inst_37:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x8000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x8000000, x5, 36, x7)
|
||||
|
||||
inst_38:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x4000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x4000000, x5, 40, x7)
|
||||
|
||||
inst_39:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x2000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x2000000, x5, 44, x7)
|
||||
|
||||
inst_40:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x1000000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x1000000, x5, 48, x7)
|
||||
|
||||
inst_41:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x800000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x800000, x5, 52, x7)
|
||||
|
||||
inst_42:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x400000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x400000, x5, 56, x7)
|
||||
|
||||
inst_43:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x200000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x200000, x5, 60, x7)
|
||||
|
||||
inst_44:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x100000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x100000, x5, 64, x7)
|
||||
|
||||
inst_45:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x80000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x80000, x5, 68, x7)
|
||||
|
||||
inst_46:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x40000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x40000, x5, 72, x7)
|
||||
|
||||
inst_47:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x20000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x20000, x5, 76, x7)
|
||||
|
||||
inst_48:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x10000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x10000, x5, 80, x7)
|
||||
|
||||
inst_49:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x8000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x8000, x5, 84, x7)
|
||||
|
||||
inst_50:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x4000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x4000, x5, 88, x7)
|
||||
|
||||
inst_51:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x2000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x2000, x5, 92, x7)
|
||||
|
||||
inst_52:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x1000;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x1000, x5, 96, x7)
|
||||
|
||||
inst_53:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x800;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x800, x5, 100, x7)
|
||||
|
||||
inst_54:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x400;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x400, x5, 104, x7)
|
||||
|
||||
inst_55:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x200;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x200, x5, 108, x7)
|
||||
|
||||
inst_56:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x1;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x1, x5, 112, x7)
|
||||
|
||||
inst_57:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x3150e5fa;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x3150e5fa, x5, 116, x7)
|
||||
|
||||
inst_58:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x90efb625;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x90efb625, x5, 120, x7)
|
||||
|
||||
inst_59:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x65408c73;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x65408c73, x5, 124, x7)
|
||||
|
||||
inst_60:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x1fc493ca;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x1fc493ca, x5, 128, x7)
|
||||
|
||||
inst_61:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xd169a3f8;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xd169a3f8, x5, 132, x7)
|
||||
|
||||
inst_62:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x8e2eac2a;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x8e2eac2a, x5, 136, x7)
|
||||
|
||||
inst_63:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xf4c30307;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xf4c30307, x5, 140, x7)
|
||||
|
||||
inst_64:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x35f9377f;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x35f9377f, x5, 144, x7)
|
||||
|
||||
inst_65:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xa0569d76;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xa0569d76, x5, 148, x7)
|
||||
|
||||
inst_66:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x58d548aa;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x58d548aa, x5, 152, x7)
|
||||
|
||||
inst_67:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x2daf9ac7;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x2daf9ac7, x5, 156, x7)
|
||||
|
||||
inst_68:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x55d98c6e;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x55d98c6e, x5, 160, x7)
|
||||
|
||||
inst_69:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xf273b44c;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xf273b44c, x5, 164, x7)
|
||||
|
||||
inst_70:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x74b8de87;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x74b8de87, x5, 168, x7)
|
||||
|
||||
inst_71:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x886c3a30;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x886c3a30, x5, 172, x7)
|
||||
|
||||
inst_72:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xccce240c;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xccce240c, x5, 176, x7)
|
||||
|
||||
inst_73:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xbb61a9cd;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xbb61a9cd, x5, 180, x7)
|
||||
|
||||
inst_74:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xb49c83dc;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xb49c83dc, x5, 184, x7)
|
||||
|
||||
inst_75:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xc5521660;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xc5521660, x5, 188, x7)
|
||||
|
||||
inst_76:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x254a9493;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x254a9493, x5, 192, x7)
|
||||
|
||||
inst_77:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x80;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x80, x5, 196, x7)
|
||||
|
||||
inst_78:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xff80;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xff80, x5, 200, x7)
|
||||
|
||||
inst_79:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x100;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x100, x5, 204, x7)
|
||||
|
||||
inst_80:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x40;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x40, x5, 208, x7)
|
||||
|
||||
inst_81:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x20;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x20, x5, 212, x7)
|
||||
|
||||
inst_82:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x10;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x10, x5, 216, x7)
|
||||
|
||||
inst_83:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x8;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x8, x5, 220, x7)
|
||||
|
||||
inst_84:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x4;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x4, x5, 224, x7)
|
||||
|
||||
inst_85:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0x2;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0x2, x5, 228, x7)
|
||||
|
||||
inst_86:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xfffffffd;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xfffffffd, x5, 232, x7)
|
||||
|
||||
inst_87:
|
||||
//
|
||||
// opcode: zext.h ; op1:x30; dest:x31; op1val:0xfffffffe;
|
||||
TEST_RD_OP(zext.h, x31, x30, 0x00000000, 0xfffffffe, x5, 236, x7)
|
||||
#endif
|
||||
|
||||
|
||||
RVTEST_CODE_END
|
||||
RVMODEL_HALT
|
||||
|
||||
RVTEST_DATA_BEGIN
|
||||
.align 4
|
||||
rvtest_data:
|
||||
.word 0xbabecafe
|
||||
.word 0xabecafeb
|
||||
.word 0xbecafeba
|
||||
.word 0xecafebab
|
||||
RVTEST_DATA_END
|
||||
|
||||
RVMODEL_DATA_BEGIN
|
||||
rvtest_sig_begin:
|
||||
sig_begin_canary:
|
||||
CANARY;
|
||||
|
||||
|
||||
signature_x1_0:
|
||||
.fill 0*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
|
||||
signature_x1_1:
|
||||
.fill 28*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
|
||||
signature_x5_0:
|
||||
.fill 60*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
#ifdef rvtest_mtrap_routine
|
||||
|
||||
tsig_begin_canary:
|
||||
CANARY;
|
||||
mtrap_sigptr:
|
||||
.fill 64*(XLEN/32),4,0xdeadbeef
|
||||
tsig_end_canary:
|
||||
CANARY;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef rvtest_gpr_save
|
||||
|
||||
gpr_save:
|
||||
.fill 32*(XLEN/32),4,0xdeadbeef
|
||||
|
||||
#endif
|
||||
|
||||
sig_end_canary:
|
||||
CANARY;
|
||||
rvtest_sig_end:
|
||||
RVMODEL_DATA_END
|
||||
Loading…
Add table
Add a link
Reference in a new issue