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[dv] fix irq timing in irq_in_debug_mode_test (#720)

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Signed-off-by: Udi <udij@google.com>
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udinator 2020-03-23 12:16:32 -07:00 • committed by GitHub
parent 0a540cffb3
commit 3af3e72b2f
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1 changed files with 2 additions and 2 deletions
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dv/uvm/core_ibex/tests/core_ibex_test_lib.sv
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@ -521,7 +521,7 @@ class core_ibex_irq_in_debug_test extends core_ibex_directed_test;
wait_for_csr_write(CSR_DCSR, 500);
check_dcsr_prv(operating_mode);
check_dcsr_cause(DBG_CAUSE_HALTREQ);
clk_vif.wait_clks($urandom_range(50, 100));
clk_vif.wait_clks($urandom_range(25, 50));
// Raise interrupts while the core is in debug mode
vseq.start_irq_raise_seq();
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@ -530,7 +530,7 @@ class core_ibex_irq_in_debug_test extends core_ibex_directed_test;
`uvm_fatal(`gfn, "Core is handling interrupt detected in debug mode")
end
begin
clk_vif.wait_clks(500);
clk_vif.wait_clks(100);
disable wait_irq;
end
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