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Move Verilator simutil upstream to OpenTitan
https://github.com/lowRISC/opentitan/pull/2311 added the Verilator memutils to OpenTitan as upstream. This commit is the second part of the story, removing the code from the Ibex repository, and vendoring it back in from OpenTitan. This also superseded #844, which has now been included through OpenTitan.
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parent
45567667f1
commit
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11 changed files with 20 additions and 22 deletions
3
vendor/lowrisc_ip.vendor.hjson
vendored
3
vendor/lowrisc_ip.vendor.hjson
vendored
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@ -15,8 +15,9 @@
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{from: "hw/dv/sv/csr_utils", to: "csr_utils"},
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{from: "hw/dv/sv/dv_lib", to: "dv_lib"},
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{from: "hw/dv/sv/dv_utils", to: "dv_utils"},
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{from: "hw/dv/verilator", to: "dv_verilator"},
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{from: "util/dvsim", to: "dvsim"},
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{from: "util/uvmdvgen", to: "uvmdvgen"}
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{from: "util/uvmdvgen", to: "uvmdvgen"},
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]
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}
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@ -45,8 +45,8 @@ bool VerilatorMemUtil::RegisterMemoryArea(const std::string name,
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size_t width_bit) {
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MemArea mem = {.name = name, .location = location, .width_bit = width_bit};
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assert((width_bit == 32 || width_bit == 64) &&
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"TODO: Check if width other than 32 and 64 works as expected.");
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assert((width_bit <= 128) &&
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"TODO: Memory loading only supported up to 128 bits.");
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auto ret = mem_register_.emplace(name, mem);
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if (ret.second == false) {
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@ -397,9 +397,9 @@ bool VerilatorMemUtil::MemWrite(const MemArea &m, const std::string &filepath,
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return false;
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}
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if ((m.width_bit % 32) != 0) {
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if ((m.width_bit % 8) != 0) {
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std::cerr << "ERROR: width for: " << m.name
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<< "must be a multiple of 32 (was : " << m.width_bit << ")"
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<< "must be a multiple of 8 (was : " << m.width_bit << ")"
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<< std::endl;
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return false;
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}
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@ -2,8 +2,8 @@
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#ifndef VERILATOR_MEMUTIL_H_
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#define VERILATOR_MEMUTIL_H_
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#ifndef OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_
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#define OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_
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#include "sim_ctrl_extension.h"
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@ -112,4 +112,4 @@ class VerilatorMemUtil : public SimCtrlExtension {
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bool WriteVmemToMem(const svScope &scope, const std::string &filepath);
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};
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#endif // VERILATOR_MEMUTIL_H_
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#endif // OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_
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@ -2,8 +2,8 @@
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#ifndef SIM_CTRL_EXTENSION_H_
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#define SIM_CTRL_EXTENSION_H_
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#ifndef OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_SIM_CTRL_EXTENSION_H_
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#define OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_SIM_CTRL_EXTENSION_H_
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class SimCtrlExtension {
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public:
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@ -38,4 +38,4 @@ class SimCtrlExtension {
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virtual void PostExec() {}
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};
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#endif // SIM_CTRL_EXTENSION_H_
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#endif // OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_SIM_CTRL_EXTENSION_H_
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@ -2,8 +2,8 @@
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#ifndef VERILATED_TOPLEVEL_H_
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#define VERILATED_TOPLEVEL_H_
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#ifndef OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATED_TOPLEVEL_H_
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#define OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATED_TOPLEVEL_H_
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#ifndef TOPLEVEL_NAME
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#error "TOPLEVEL_NAME must be set to the name of the toplevel."
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@ -152,4 +152,4 @@ class TOPLEVEL_NAME : public VERILATED_TOPLEVEL_NAME, public VerilatedToplevel {
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}
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};
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#endif // VERILATED_TOPLEVEL_H_
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#endif // OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATED_TOPLEVEL_H_
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@ -5,12 +5,11 @@
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#include "verilator_sim_ctrl.h"
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#include <getopt.h>
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#include <iostream>
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#include <signal.h>
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#include <sys/stat.h>
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#include <verilated.h>
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#include <iostream>
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// This is defined by Verilator and passed through the command line
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#ifndef VM_TRACE
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#define VM_TRACE 0
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@ -202,9 +201,7 @@ bool VerilatorSimCtrl::ParseCommandArgs(int argc, char **argv, bool &exit_app) {
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}
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void VerilatorSimCtrl::PrintHelp() const {
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std::cout << "Execute a simulation model for " << GetName()
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<< "\n"
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"\n";
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std::cout << "Execute a simulation model for " << GetName() << "\n\n";
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if (tracing_possible_) {
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std::cout << "-t|--trace\n"
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" Write a trace file from the start\n\n";
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@ -2,8 +2,8 @@
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#ifndef VERILATOR_SIM_CTRL_H_
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#define VERILATOR_SIM_CTRL_H_
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#ifndef OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATOR_SIM_CTRL_H_
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#define OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATOR_SIM_CTRL_H_
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#include <chrono>
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#include <string>
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@ -237,4 +237,4 @@ class VerilatorSimCtrl {
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void Trace();
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};
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#endif // VERILATOR_SIM_CTRL_H_
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#endif // OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATOR_SIM_CTRL_H_
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