Consolidate the script logging (#329)

This commit is contained in:
taoliug 2019-09-17 16:41:43 -07:00 committed by udinator
parent e7123f1c2d
commit 47acadc969
3 changed files with 3 additions and 20 deletions

View file

@ -61,7 +61,6 @@ class ibex_mem_intf_slave_driver extends uvm_driver #(ibex_mem_intf_seq_item);
virtual protected task send_grant();
int gnt_delay;
forever begin
vif.grant = 1'b1;
while(vif.request !== 1'b1) begin
@(negedge vif.clock);
end

View file

@ -11,6 +11,7 @@ import sys
sys.path.insert(0, "../../vendor/google_riscv-dv/scripts")
from riscv_trace_csv import *
from lib import *
def process_ibex_sim_log(ibex_log, csv):
@ -19,7 +20,7 @@ def process_ibex_sim_log(ibex_log, csv):
Extract instruction and affected register information from ibex simulation
log and save to a standard CSV format.
"""
print("Processing ibex log : %s" % ibex_log)
logging.info("Processing ibex log : %s" % ibex_log)
instr_cnt = 0
ibex_instr = ""
@ -44,7 +45,7 @@ def process_ibex_sim_log(ibex_log, csv):
trace_csv.write_trace_entry(rv_instr_trace)
instr_cnt += 1
print("Processed instruction count : %d" % instr_cnt)
logging.info("Processed instruction count : %d" % instr_cnt)
def check_ibex_uvm_log(uvm_log, core_name, test_name, report, write=True):

View file

@ -22,7 +22,6 @@ import random
import re
import subprocess
import sys
import logging
sys.path.insert(0, "../../vendor/google_riscv-dv/scripts")
sys.path.insert(0, "./riscv_dv_extension")
@ -33,22 +32,6 @@ from spike_log_to_trace_csv import *
from ovpsim_log_to_trace_csv import *
from instr_trace_compare import *
# TODO: Move this common function to riscv-dv/lib
def setup_logging(verbose):
"""Setup the root logger.
Args:
verbose: Verbose logging
"""
if verbose:
logging.basicConfig(format="%(asctime)s %(filename)s:%(lineno)-5s %(levelname)-8s %(message)s",
datefmt='%a, %d %b %Y %H:%M:%S',
level=logging.DEBUG)
else:
logging.basicConfig(format="%(asctime)s %(levelname)-8s %(message)s",
datefmt='%a, %d %b %Y %H:%M:%S',
level=logging.INFO)
def process_cmd(keyword, cmd, opts, enable):
""" Process the compile and simulation command