update riscvOVPsim.ic for semihosting mode (#681)

Signed-off-by: Udi <udij@google.com>
This commit is contained in:
udinator 2020-03-10 16:50:29 -07:00 committed by GitHub
parent 7b97d21b42
commit 4cb3fc4ce6
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23

View file

@ -17,5 +17,6 @@
--override riscvOVPsim/cpu/time_undefined=F
--override riscvOVPsim/cpu/reset_address=0x80000080
--override riscvOVPsim/cpu/simulateexceptions=T
--override riscvOVPsim/cpu/defaultsemihost=F
--override riscvOVPsim/cpu/wfi_is_nop=T
--override riscvOVPsim/cpu/tval_ii_code=T