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fixed issue with include file

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This commit is contained in:
Gautschi 2016-06-23 14:36:30 +02:00
parent 7f6bb8ebb4
commit 55d66013ae
3 changed files with 2 additions and 13 deletions
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11
include/riscv_defines.sv
View file

@ -25,17 +25,6 @@
package riscv_defines;
// no traces for synthesis, they are not synthesizable
`ifndef SYNTHESIS
`ifndef PULP_FPGA_EMUL
`define TRACE_EXECUTION
`endif
//`define SIMCHECKER
`endif
////////////////////////////////////////////////
// ___ ____ _ //
// / _ \ _ __ / ___|___ __| | ___ ___ //

2
riscv_core.sv
View file

@ -24,7 +24,7 @@
// //
////////////////////////////////////////////////////////////////////////////////
`include "include/riscv_config.sv"
`include "riscv_config.sv"
import riscv_defines::*;

2
riscv_simchecker.sv
View file

@ -21,7 +21,7 @@
// //
////////////////////////////////////////////////////////////////////////////////
`include "include/riscv_config.sv"
`include "riscv_config.sv"
import riscv_defines::*;