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Make sure the address is kept stable when we are waiting for a gnt
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1 changed files with 10 additions and 1 deletions
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@ -39,6 +39,7 @@ module riscv_fetch_fifo
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input logic in_addr_valid_i,
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output logic in_addr_ready_o,
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output logic [31:0] in_fetch_addr_o,
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input logic in_wait_gnt_i,
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input logic in_rdata_valid_i,
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output logic in_rdata_ready_o,
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@ -99,7 +100,7 @@ module riscv_fetch_fifo
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out_rdata_o = rdata_unaligned;
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if (unaligned_is_compressed)
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out_valid_o = 1'b1;
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out_valid_o = valid;
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else
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out_valid_o = valid_unaligned;
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end else begin
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@ -143,6 +144,9 @@ module riscv_fetch_fifo
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begin
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in_fetch_addr_o = {fifo_last_addr[31:2], 2'b00} + 32'd4;
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if (in_wait_gnt_i)
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in_fetch_addr_o = {fifo_last_addr[31:2], 2'b00};
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if (branch_i) begin
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in_fetch_addr_o = addr_i;
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end else begin
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@ -344,6 +348,8 @@ module riscv_prefetch_buffer
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logic fifo_rdata_valid;
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logic fifo_rdata_ready;
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logic wait_gnt;
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//////////////////////////////////////////////////////////////////////////////
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// prefetch buffer status
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@ -370,6 +376,7 @@ module riscv_prefetch_buffer
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.in_addr_valid_i ( fifo_addr_valid ),
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.in_addr_ready_o ( fifo_addr_ready ),
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.in_fetch_addr_o ( fetch_addr ),
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.in_wait_gnt_i ( wait_gnt ),
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.in_rdata_valid_i ( fifo_rdata_valid ),
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.in_rdata_ready_o ( fifo_rdata_ready ),
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@ -390,6 +397,7 @@ module riscv_prefetch_buffer
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always_comb
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begin
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wait_gnt = 1'b0;
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instr_req_o = 1'b0;
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instr_addr_o = fetch_addr;
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fifo_addr_valid = 1'b0;
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@ -418,6 +426,7 @@ module riscv_prefetch_buffer
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// we sent a request but did not yet get a grant
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WAIT_GNT:
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begin
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wait_gnt = 1'b1;
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instr_req_o = 1'b1;
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if (branch_i) begin
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