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[dv,core_ibex] Fix order of 'm' and 'c' in ISA string

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Recent versions of Spike allow rv32imc but not rv32icm.
This commit is contained in:
Rupert Swarbrick 2022-03-17 21:41:29 +00:00 • committed by Rupert Swarbrick
parent 6bb67e20f8
commit 63509ff4da
1 changed files with 2 additions and 1 deletions
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3
dv/uvm/core_ibex/tests/core_ibex_base_test.sv
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@ -61,8 +61,9 @@ class core_ibex_base_test extends uvm_test;
// Note that the bitmanip extensions from the v0.93 spec (Zbe, Zbf, Zbp, Zbr, Zbt) are all
// contained in "Xbitmanip" for Spike at the moment. The specific parts used are listed in
// comments below.
isa = {"rv32", RV32E ? "e" : "i", "c"};
isa = {"rv32", RV32E ? "e" : "i"};
if (RV32M != RV32MNone) isa = {isa, "m"};
isa = {isa, "c"};
case (RV32B)
RV32BNone:
;