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[rtl] Flush pipe on MSECCFG CSR write

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Without this an instruction executed immediately after the MSECCFG write
doesn't have the new MSECCFG setup applied to its execute permission.
This commit is contained in:
Greg Chadwick 2022-11-16 16:26:41 +00:00 • committed by Greg Chadwick
parent fb32236a3f
commit 726eb97a88
1 changed files with 1 additions and 0 deletions
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rtl/ibex_id_stage.sv
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@ -522,6 +522,7 @@ module ibex_id_stage #(
if (csr_op_en_o == 1'b1 && (csr_op_o == CSR_OP_WRITE || csr_op_o == CSR_OP_SET)) begin
if (csr_num_e'(instr_rdata_i[31:20]) == CSR_MSTATUS ||
csr_num_e'(instr_rdata_i[31:20]) == CSR_MIE ||
csr_num_e'(instr_rdata_i[31:20]) == CSR_MSECCFG ||
// To catch all PMPCFG/PMPADDR registers, get the shared top most 7 bits.
instr_rdata_i[31:25] == 7'h1D) begin
csr_pipe_flush = 1'b1;