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Fix a compressed instruction decoding error

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If the register 0b01000 was selected for srai and srli for a compressed
instruction, it was considered an illegal instruction which is wrong

This is a legacy from the specification changes from >6 months ago
This commit is contained in:
Andreas Traber 2016-04-01 10:57:25 +02:00
parent 1f2659d380
commit 8edb42244b
2 changed files with 0 additions and 6 deletions
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1
compressed_decoder.sv
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@ -115,7 +115,6 @@ module riscv_compressed_decoder
instr_o = {1'b0, instr_i[10], 5'b0, instr_i[6:2], 2'b01, instr_i[9:7], 3'b101, 2'b01, instr_i[9:7], `OPCODE_OPIMM};
if (instr_i[12] == 1'b1) illegal_instr_o = 1'b1;
if (instr_i[6:2] == 5'b0) illegal_instr_o = 1'b1;
if (instr_i[9:7] == 5'b0) illegal_instr_o = 1'b1;
end
2'b10: begin

5
decoder.sv
View file

@ -345,11 +345,6 @@ module riscv_decoder
7'b0101_000: data_type_o = 2'b01; // LH, LHU
7'b0010_000: data_type_o = 2'b00; // LW
default: begin
data_type_o = 2'b00;
// illegal instruction
data_req = 1'b0;
regfile_mem_we = 1'b0;
regfile_alu_we = 1'b0;
illegal_insn_o = 1'b1;
end
endcase