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[fcov] Add coverage for making PMP regions executable.
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@ -280,6 +280,11 @@ PMP
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* Access close to PMP region modification that allows/disallows that access.
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* ``pmp_wr_exec_region`` - Explores behaviour around adding executable regions when MML is enabled.
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Cross of current region configuration with region configuration that is being written and RLB setting.
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It only considers regions that aren't currently executable with writes attempted to make them executable.
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Non MML configurations are not sampled.
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CSRs
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^^^^
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Basic read/write functionality must be tested on all implemented CSRs.
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@ -138,12 +138,20 @@ interface core_ibex_pmp_fcov_if import ibex_pkg::*; #(
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for (genvar i_region = 0; i_region < PMPNumRegions; i_region += 1) begin : g_pmp_region_fcov
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pmp_priv_bits_e pmp_region_priv_bits;
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pmp_priv_bits_e pmp_region_priv_bits_wr;
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assign pmp_region_priv_bits = pmp_priv_bits_e'({csr_pmp_mseccfg.mml,
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csr_pmp_cfg[i_region].lock,
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csr_pmp_cfg[i_region].exec,
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csr_pmp_cfg[i_region].write,
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csr_pmp_cfg[i_region].read});
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assign pmp_region_priv_bits_wr =
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pmp_priv_bits_e'({csr_pmp_mseccfg.mml,
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cs_registers_i.g_pmp_registers.pmp_cfg_wdata[i_region].lock,
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cs_registers_i.g_pmp_registers.pmp_cfg_wdata[i_region].exec,
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cs_registers_i.g_pmp_registers.pmp_cfg_wdata[i_region].write,
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cs_registers_i.g_pmp_registers.pmp_cfg_wdata[i_region].read});
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// Do the permission check for Data channel with the privilege level from Instruction channels.
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// This way we can check the effect of mstatus.mprv changing privilege levels for LSU related
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// operations.
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@ -431,6 +439,33 @@ interface core_ibex_pmp_fcov_if import ibex_pkg::*; #(
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csr_pmp_cfg[i_region].lock &&
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cs_registers_i.g_pmp_registers.g_pmp_csrs[i_region].u_pmp_addr_csr.wr_en_i &&
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csr_pmp_mseccfg.rlb)
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// Only sample this cross when we attempt to write to a PMP config that doesn't currently
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// allow execution with MML enabled
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pmp_wr_exec_region :
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cross pmp_region_priv_bits, pmp_region_priv_bits_wr, csr_pmp_mseccfg.rlb iff
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(fcov_csr_write &&
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csr_pmp_mseccfg.mml &&
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cs_registers_i.csr_we_int &&
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cs_registers_i.csr_addr == (CSR_OFF_PMP_CFG + (i_region[11:0] >> 2)) &&
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((!pmp_region_priv_bits[2] && pmp_region_priv_bits != MML_XM_XU) ||
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pmp_region_priv_bits inside {MML_WRM_WRU, MML_RM_RU})) {
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// Only interested in MML configuration
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ignore_bins non_mml_in = binsof(pmp_region_priv_bits) with (!pmp_region_priv_bits[4]);
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ignore_bins non_mml_out =
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binsof(pmp_region_priv_bits_wr) with (!pmp_region_priv_bits_wr[4]);
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// Only interested in starting configs that weren't executable so ignore executable
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// regions
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ignore_bins from_exec_bins = binsof(pmp_region_priv_bits) intersect {MML_XU, MML_XRU,
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MML_XWRU, MML_XM_XU, MML_XM, MML_XRM, MML_XRM_XU};
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// Only interested in writes that give executable regions so ignore non executable regions
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ignore_bins to_non_exec_bins = binsof(pmp_region_priv_bits_wr) intersect {MML_NONE,
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MML_RU, MML_WRM_RU, MML_WRU, MML_WRM_WRU, MML_L, MML_RM, MML_WRM, MML_RM_RU};
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}
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endgroup
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`DV_FCOV_INSTANTIATE_CG(pmp_region_cg, en_pmp_fcov)
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