Fix compile issue caused by design changes (#179)

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taoliug 2019-07-19 18:01:12 -07:00 committed by GitHub
parent 74e841b0cd
commit bc61f0bfd9
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@ -6,8 +6,8 @@ ${PRJ_DIR}/ibex/dv/uvm/tb/prim_clock_gating.sv
// ibex CORE RTL files
+incdir+${PRJ_DIR}/ibex/rtl
${PRJ_DIR}/ibex/rtl/ibex_defines.sv
${PRJ_DIR}/ibex/rtl/ibex_tracer_defines.sv
${PRJ_DIR}/ibex/rtl/ibex_pkg.sv
${PRJ_DIR}/ibex/rtl/ibex_tracer_pkg.sv
${PRJ_DIR}/ibex/rtl/ibex_tracer.sv
${PRJ_DIR}/ibex/rtl/ibex_alu.sv
${PRJ_DIR}/ibex/rtl/ibex_compressed_decoder.sv