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Only read CSR when accessed

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Sven Stucki 2015-10-27 14:15:09 +01:00
parent 0b0b4c0c29
commit c78a5a6954
1 changed files with 16 additions and 14 deletions
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30
cs_registers.sv
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@ -124,22 +124,24 @@ module riscv_cs_registers
begin
csr_rdata_int = 'x;
case (csr_addr_i)
// mstatus: always M-mode, contains IE bit
12'h300: csr_rdata_int = {29'b0, 2'b11, irq_enable};
if (csr_access_i) begin
case (csr_addr_i)
// mstatus: always M-mode, contains IE bit
12'h300: csr_rdata_int = {29'b0, 2'b11, irq_enable};
// mscratch
12'h340: csr_rdata_int = csr[`CSR_IDX_MSCRATCH];
// mepc: exception program counter
12'h341: csr_rdata_int = csr[`CSR_IDX_MEPC];
// mscratch
12'h340: csr_rdata_int = csr[`CSR_IDX_MSCRATCH];
// mepc: exception program counter
12'h341: csr_rdata_int = csr[`CSR_IDX_MEPC];
// mcpuid: RV32I
12'hF00: csr_rdata_int = 32'h00_00_01_00;
// mimpid: PULP, anonymous source (no allocated ID yet)
12'hF01: csr_rdata_int = 32'h00_00_80_00;
// mhartid: unique hardware thread id
12'hF10: csr_rdata_int = {22'b0, cluster_id_i, core_id_i};
endcase
// mcpuid: RV32I
12'hF00: csr_rdata_int = 32'h00_00_01_00;
// mimpid: PULP, anonymous source (no allocated ID yet)
12'hF01: csr_rdata_int = 32'h00_00_80_00;
// mhartid: unique hardware thread id
12'hF10: csr_rdata_int = {22'b0, cluster_id_i, core_id_i};
endcase
end
end