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Handle branch_in_ex in case of splitted adder
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2 changed files with 11 additions and 2 deletions
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@ -319,7 +319,12 @@ module riscv_controller
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// decode and execute instructions only if the current conditional
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// decode and execute instructions only if the current conditional
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// branch in the EX stage is either not taken, or there is no
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// branch in the EX stage is either not taken, or there is no
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// conditional branch in the EX stage
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// conditional branch in the EX stage
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// CONFIG_REGION: SPLITTED_ADDER
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`ifdef SPLITTED_ADDER
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if (instr_valid_i && (~branch_taken_ex_i) && ex_valid_i)
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`else
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if (instr_valid_i && (~branch_taken_ex_i))
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if (instr_valid_i && (~branch_taken_ex_i))
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`endif
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begin // now analyze the current instruction in the ID stage
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begin // now analyze the current instruction in the ID stage
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is_decoding_o = 1'b1;
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is_decoding_o = 1'b1;
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@ -431,7 +436,12 @@ module riscv_controller
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// TODO: make sure this is not done multiple times in a row!!!
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// TODO: make sure this is not done multiple times in a row!!!
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// maybe with an assertion?
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// maybe with an assertion?
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// handle conditional branches
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// handle conditional branches
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// CONFIG_REGION: SPLITTED_ADDER
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`ifdef SPLITTED_ADDER
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if (branch_taken_ex_i & ex_valid_i) begin
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`else
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if (branch_taken_ex_i) begin
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if (branch_taken_ex_i) begin
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`endif
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// there is a branch in the EX stage that is taken
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// there is a branch in the EX stage that is taken
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pc_mux_o = PC_BRANCH;
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pc_mux_o = PC_BRANCH;
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pc_set_o = 1'b1;
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pc_set_o = 1'b1;
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@ -1578,13 +1578,12 @@ always_ff @(posedge clk, negedge rst_n)
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if ((jump_in_id == BRANCH_COND) || data_load_event_id) begin
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if ((jump_in_id == BRANCH_COND) || data_load_event_id) begin
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pc_ex_o <= pc_id_i;
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pc_ex_o <= pc_id_i;
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end
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end
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branch_in_ex_o <= jump_in_id == BRANCH_COND;
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`else
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`else
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if ((jump_in_id == BRANCH_COND) || (jump_in_id == BRANCH_JAL) || (jump_in_id == BRANCH_JALR) || data_load_event_id) begin
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if ((jump_in_id == BRANCH_COND) || (jump_in_id == BRANCH_JAL) || (jump_in_id == BRANCH_JALR) || data_load_event_id) begin
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pc_ex_o <= pc_id_i;
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pc_ex_o <= pc_id_i;
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end
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end
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branch_in_ex_o <= (jump_in_id == BRANCH_COND) || (jump_in_id == BRANCH_JAL) || (jump_in_id == BRANCH_JALR);
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`endif
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`endif
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branch_in_ex_o <= jump_in_id == BRANCH_COND;
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end else if(ex_ready_i) begin
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end else if(ex_ready_i) begin
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// EX stage is ready but we don't have a new instruction for it,
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// EX stage is ready but we don't have a new instruction for it,
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