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Add missing include

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Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
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Pirmin Vogel 2020-04-23 14:53:30 +02:00
parent a39cc33f7a
commit dcf18d86c3
1 changed files with 2 additions and 0 deletions
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2
rtl/ibex_core.sv
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@ -7,6 +7,8 @@
`define RVFI
`endif
`include "prim_assert.sv"
/**
* Top level module of the ibex RISC-V core
*/