[dv] Add MHPM Counter number param to SpikeCosim

This commit adds another field in SpikeCosim class so that Spike
can hardcode the correct event registers.

Signed-off-by: Canberk Topal <ctopal@lowrisc.org>
This commit is contained in:
Canberk Topal 2022-09-28 17:11:08 +01:00 committed by Canberk Topal
parent 08115056f9
commit e27deb1015
11 changed files with 43 additions and 18 deletions

View file

@ -34,7 +34,8 @@
SpikeCosim::SpikeCosim(const std::string &isa_string, uint32_t start_pc,
uint32_t start_mtvec, const std::string &trace_log_path,
bool secure_ibex, bool icache_en,
uint32_t pmp_num_regions, uint32_t pmp_granularity)
uint32_t pmp_num_regions, uint32_t pmp_granularity,
uint32_t mhpm_counter_num)
: nmi_mode(false), pending_iside_error(false), insn_cnt(0) {
FILE *log_file = nullptr;
if (trace_log_path.length() != 0) {
@ -54,10 +55,11 @@ SpikeCosim::SpikeCosim(const std::string &isa_string, uint32_t start_pc,
#endif
processor->set_pmp_num(pmp_num_regions);
processor->set_mhpm_counter_num(mhpm_counter_num);
processor->set_pmp_granularity(1 << (pmp_granularity + 2));
processor->set_ibex_flags(secure_ibex, icache_en);
initial_proc_setup(start_pc, start_mtvec);
initial_proc_setup(start_pc, start_mtvec, mhpm_counter_num);
if (log) {
processor->set_debug(true);
@ -438,7 +440,8 @@ void SpikeCosim::leave_nmi_mode() {
#endif
}
void SpikeCosim::initial_proc_setup(uint32_t start_pc, uint32_t start_mtvec) {
void SpikeCosim::initial_proc_setup(uint32_t start_pc, uint32_t start_mtvec,
uint32_t mhpm_counter_num) {
processor->get_state()->pc = start_pc;
processor->get_state()->mtvec->write(start_mtvec);
@ -451,6 +454,12 @@ void SpikeCosim::initial_proc_setup(uint32_t start_pc, uint32_t start_mtvec) {
processor->TM.tdata2_write(processor.get(), i, 0);
processor->TM.tdata1_write(processor.get(), i, 0x28001048);
}
for (int i = 0; i < mhpm_counter_num; i++) {
processor->get_state()->csrmap[CSR_MHPMEVENT3 + i] =
std::make_shared<const_csr_t>(processor.get(), CSR_MHPMEVENT3 + i,
1 << i);
}
}
void SpikeCosim::set_mip(uint32_t mip) {

View file

@ -69,7 +69,8 @@ class SpikeCosim : public simif_t, public Cosim {
void leave_nmi_mode();
void initial_proc_setup(uint32_t start_pc, uint32_t start_mtvec);
void initial_proc_setup(uint32_t start_pc, uint32_t start_mtvec,
uint32_t mhpm_counter_num);
unsigned int insn_cnt;
@ -77,7 +78,7 @@ class SpikeCosim : public simif_t, public Cosim {
SpikeCosim(const std::string &isa_string, uint32_t start_pc,
uint32_t start_mtvec, const std::string &trace_log_path,
bool secure_ibex, bool icache_en, uint32_t pmp_num_regions,
uint32_t pmp_granularity);
uint32_t pmp_granularity, uint32_t mhpm_counter_num);
// simif_t implementation
virtual char *addr_to_mem(reg_t addr) override;

View file

@ -10,6 +10,7 @@ class core_ibex_cosim_cfg extends uvm_object;
string log_file;
bit [31:0] pmp_num_regions;
bit [31:0] pmp_granularity;
bit [31:0] mhpm_counter_num;
bit relax_cosim_check;
bit secure_ibex;
bit icache;
@ -22,6 +23,7 @@ class core_ibex_cosim_cfg extends uvm_object;
`uvm_field_string(log_file, UVM_DEFAULT)
`uvm_field_int(pmp_num_regions, UVM_DEFAULT)
`uvm_field_int(pmp_granularity, UVM_DEFAULT)
`uvm_field_int(mhpm_counter_num, UVM_DEFAULT)
`uvm_field_int(secure_ibex, UVM_DEFAULT)
`uvm_field_int(icache, UVM_DEFAULT)
`uvm_object_utils_end

View file

@ -62,7 +62,7 @@ class ibex_cosim_scoreboard extends uvm_scoreboard;
// TODO: Ensure log file on reset gets append rather than overwrite?
cosim_handle = spike_cosim_init(cfg.isa_string, cfg.start_pc, cfg.start_mtvec, cfg.log_file,
cfg.pmp_num_regions, cfg.pmp_granularity, cfg.secure_ibex, cfg.icache);
cfg.pmp_num_regions, cfg.pmp_granularity, cfg.mhpm_counter_num, cfg.secure_ibex, cfg.icache);
if (cosim_handle == null) begin
`uvm_fatal(`gfn, "Could not initialise cosim")

View file

@ -13,7 +13,8 @@ extern "C" {
void *spike_cosim_init(const char *isa_string, svBitVecVal *start_pc,
svBitVecVal *start_mtvec, const char *log_file_path_cstr,
svBitVecVal *pmp_num_regions,
svBitVecVal *pmp_granularity, svBit secure_ibex,
svBitVecVal *pmp_granularity,
svBitVecVal *mhpm_counter_num, svBit secure_ibex,
svBit icache) {
assert(isa_string);
@ -23,9 +24,9 @@ void *spike_cosim_init(const char *isa_string, svBitVecVal *start_pc,
log_file_path = log_file_path_cstr;
}
SpikeCosim *cosim = new SpikeCosim(isa_string, start_pc[0], start_mtvec[0],
log_file_path, secure_ibex, icache,
pmp_num_regions[0], pmp_granularity[0]);
SpikeCosim *cosim = new SpikeCosim(
isa_string, start_pc[0], start_mtvec[0], log_file_path, secure_ibex,
icache, pmp_num_regions[0], pmp_granularity[0], mhpm_counter_num[0]);
cosim->add_memory(0x80000000, 0x80000000);
cosim->add_memory(0x00000000, 0x80000000);
return static_cast<Cosim *>(cosim);

View file

@ -12,6 +12,7 @@ import "DPI-C" function
string log_file_path,
bit [31:0] pmp_num_regions,
bit [31:0] pmp_granularity,
bit [31:0] mhpm_counter_num,
bit secure_ibex,
bit icache);

View file

@ -299,6 +299,7 @@ module core_ibex_tb_top;
uvm_config_db#(bit [31:0])::set(null, "*", "PMPGranularity", 0);
end
uvm_config_db#(bit [31:0])::set(null, "*", "MHPMCounterNum", MHPMCounterNum);
uvm_config_db#(bit)::set(null, "*", "SecureIbex", SecureIbex);
uvm_config_db#(bit)::set(null, "*", "ICache", ICache);

View file

@ -81,6 +81,7 @@ class core_ibex_base_test extends uvm_test;
string cosim_log_file;
bit [31:0] pmp_num_regions;
bit [31:0] pmp_granularity;
bit [31:0] mhpm_counter_num;
bit secure_ibex;
bit icache;
@ -121,6 +122,10 @@ class core_ibex_base_test extends uvm_test;
pmp_granularity = '0;
end
if (!uvm_config_db#(bit [31:0])::get(null, "", "MHPMCounterNum", mhpm_counter_num)) begin
mhpm_counter_num = '0;
end
if (!uvm_config_db#(bit)::get(null, "", "SecureIbex", secure_ibex)) begin
secure_ibex = '0;
end
@ -131,6 +136,7 @@ class core_ibex_base_test extends uvm_test;
cosim_cfg.pmp_num_regions = pmp_num_regions;
cosim_cfg.pmp_granularity = pmp_granularity;
cosim_cfg.mhpm_counter_num = mhpm_counter_num;
cosim_cfg.relax_cosim_check = cfg.disable_cosim;
cosim_cfg.secure_ibex = secure_ibex;
cosim_cfg.icache = icache;

View file

@ -7,7 +7,8 @@ module ibex_simple_system_cosim_checker #(
parameter bit ICache = 1'b0,
parameter bit PMPEnable = 1'b0,
parameter int unsigned PMPGranularity = 0,
parameter int unsigned PMPNumRegions = 4
parameter int unsigned PMPNumRegions = 4,
parameter int unsigned MHPMCounterNum = 0
) (
input clk_i,
input rst_ni,
@ -25,7 +26,7 @@ module ibex_simple_system_cosim_checker #(
);
import "DPI-C" function chandle get_spike_cosim;
import "DPI-C" function void create_cosim(bit secure_ibex, bit icache_en,
bit [31:0] pmp_num_regions, bit [31:0] pmp_granularity);
bit [31:0] pmp_num_regions, bit [31:0] pmp_granularity, bit [31:0] mhpm_counter_num);
import ibex_pkg::*;
@ -35,7 +36,7 @@ module ibex_simple_system_cosim_checker #(
localparam int unsigned LocalPMPGranularity = PMPEnable ? PMPGranularity : 0;
localparam int unsigned LocalPMPNumRegions = PMPEnable ? PMPNumRegions : 0;
create_cosim(SecureIbex, ICache, LocalPMPNumRegions, LocalPMPGranularity);
create_cosim(SecureIbex, ICache, LocalPMPNumRegions, LocalPMPGranularity, MHPMCounterNum);
cosim_handle = get_spike_cosim();
end

View file

@ -8,7 +8,8 @@ module ibex_simple_system_cosim_checker_bind;
.ICache,
.PMPEnable,
.PMPGranularity,
.PMPNumRegions
.PMPNumRegions,
.MHPMCounterNum
) u_ibex_simple_system_cosim_checker_bind (
.clk_i (IO_CLK),
.rst_ni (IO_RST_N),

View file

@ -20,10 +20,11 @@ class SimpleSystemCosim : public SimpleSystem {
~SimpleSystemCosim() {}
void CreateCosim(bool secure_ibex, bool icache_en, uint32_t pmp_num_regions,
uint32_t pmp_granularity) {
uint32_t pmp_granularity, uint32_t mhpm_counter_num) {
_cosim = std::make_unique<SpikeCosim>(
GetIsaString(), 0x100080, 0x100001, "simple_system_cosim.log",
secure_ibex, icache_en, pmp_num_regions, pmp_granularity);
secure_ibex, icache_en, pmp_num_regions, pmp_granularity,
mhpm_counter_num);
_cosim->add_memory(0x100000, 1024 * 1024);
_cosim->add_memory(0x20000, 4096);
@ -68,10 +69,11 @@ void *get_spike_cosim() {
void create_cosim(svBit secure_ibex, svBit icache_en,
const svBitVecVal *pmp_num_regions,
const svBitVecVal *pmp_granularity) {
const svBitVecVal *pmp_granularity,
const svBitVecVal *mhpm_counter_num) {
assert(simple_system_cosim);
simple_system_cosim->CreateCosim(secure_ibex, icache_en, pmp_num_regions[0],
pmp_granularity[0]);
pmp_granularity[0], mhpm_counter_num[0]);
}
}