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Update riscv-isa-sim to lowrisc/riscv-isa-sim@a4b823a1

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Update code from upstream repository https://github.com/lowrisc/riscv-
isa-sim to revision a4b823a1c7a260b532e1aa41b4d929e9634a7222

* Remove personal paths from Makefile (Marno van der Maas)
* Remove trailing whitespace (Marno van der Maas)

Signed-off-by: Marno van der Maas <mvdmaas+git@lowrisc.org>
This commit is contained in:
Marno van der Maas 2023-07-11 16:42:41 +01:00 • committed by Marno van der Maas
parent 5a485db97b
commit e791ed49f3
2 changed files with 11 additions and 11 deletions
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4
vendor/riscv-isa-sim/tests/mseccfg/Makefile vendored
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@ -2,8 +2,8 @@
XLEN ?= 32
VLEN ?= 1024
RISCV_TOOL ?= /home/saad/Downloads/lowrisc-toolchain-gcc-rv32imcb-20220524-1/bin/
SPIKE_PATH ?= /home/saad/work/riscv-isa-sim/build
RISCV_TOOL ?= ~/lowrisc-toolchain-gcc-rv32imcb-20220524-1/bin/
SPIKE_PATH ?= ~/riscv-isa-sim/build
SAIL_EMULATOR_PATH = /home/scratch.soberl_maxwell/arch1/sail_2021/sail-riscv/c_emulator
SSP_OPT ?=

2
vendor/riscv_isa_sim.lock.hjson vendored
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@ -9,6 +9,6 @@
upstream:
{
url: https://github.com/lowrisc/riscv-isa-sim
rev: a7c5d5d830e4095aa86580579efc46335fbc2f80
rev: a4b823a1c7a260b532e1aa41b4d929e9634a7222
}
}