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[syn] Use sv2v for prim_generic_buf
Convert `prim_generic_buf` to Verilog as well. Also, replace 'prim_buf' with 'prim_generic_buf' whenever we see a `prim_buf` in a generated Verilog file. Fixes #1557 Signed-off-by: Canberk Topal <ctopal@lowrisc.org>
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1 changed files with 21 additions and 1 deletions
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@ -32,10 +32,26 @@ source syn_setup.sh
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# use sv2v to convert all SystemVerilog files to Verilog
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#-------------------------------------------------------------------------
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LR_DEP_SOURCES=(
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"../vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_buf.sv"
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)
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mkdir -p "$LR_SYNTH_OUT_DIR/generated"
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mkdir -p "$LR_SYNTH_OUT_DIR/log"
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mkdir -p "$LR_SYNTH_OUT_DIR/reports/timing"
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# Convert dependency sources
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for file in ${LR_DEP_SOURCES[@]}; do
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module=`basename -s .sv $file`
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sv2v \
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--define=SYNTHESIS --define=YOSYS \
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-I../vendor/lowrisc_ip/ip/prim/rtl \
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$file \
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> $LR_SYNTH_OUT_DIR/generated/${module}.v
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done
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# Convert core sources
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for file in ../rtl/*.sv; do
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module=`basename -s .sv $file`
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@ -45,7 +61,7 @@ for file in ../rtl/*.sv; do
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fi
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sv2v \
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--define=SYNTHESIS \
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--define=SYNTHESIS --define=YOSYS \
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../rtl/*_pkg.sv \
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../vendor/lowrisc_ip/ip/prim/rtl/prim_ram_1p_pkg.sv \
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../vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv \
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@ -53,6 +69,10 @@ for file in ../rtl/*.sv; do
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-I../vendor/lowrisc_ip/dv/sv/dv_utils \
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$file \
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> $LR_SYNTH_OUT_DIR/generated/${module}.v
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# Make sure auto-generated primitives are resolved to generic primitives
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# where available.
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sed -i 's/prim_buf/prim_generic_buf/g' $LR_SYNTH_OUT_DIR/generated/${module}.v
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done
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# remove tracer (not needed for synthesis)
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