mirror of
https://github.com/lowRISC/ibex.git
synced 2025-04-23 13:27:10 -04:00
Remove ISA, ISA_ISS from Makefile
Move their calculation into the Python scripts, which means that we don't have to make sure everything is kept in sync.
This commit is contained in:
parent
b63ab3b120
commit
ecdb1e01f6
7 changed files with 63 additions and 24 deletions
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@ -46,9 +46,6 @@ COV := 0
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SIMULATOR := vcs
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# ISS (spike, ovpsim)
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ISS := spike
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# ISA
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ISA := rv32imcb
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ISA_ISS := rv32imc_Zba_Zbb_Zbc_Zbs_Xbitmanip
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# Test name (default: full regression)
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TEST := all
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TESTLIST := riscv_dv_extension/testlist.yaml
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@ -102,7 +99,6 @@ clean:
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# Options used for privileged CSR test generation
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CSR_OPTS=--csr_yaml=${CSR_FILE} \
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--isa="${ISA}" \
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--end_signature_addr=${SIGNATURE_ADDR}
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# This is a list of directories that are automatically generated by some
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@ -198,7 +194,7 @@ ts-dirs := $(foreach ts,$(tests-and-seeds),$(RUN-DIR)/$(ts)/)
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# This depends on the vendored in code in $(GEN_DIR). It also depends on the
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# values of the following Makefile variables (we want to regenerate things if,
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# for example, the simulator changes).
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instr-gen-build-var-deps := SIMULATOR ISA CSR_OPTS \
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instr-gen-build-var-deps := SIMULATOR CSR_OPTS \
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SIGNATURE_ADDR PMP_REGIONS PMP_GRANULARITY
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# To achieve this variable tracking, we dump each of the variables to a Makefile
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# fragment and try to load it up the next time around. This done with the
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@ -241,9 +237,9 @@ $(BUILD-DIR)/instr-gen/.compile.stamp: \
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$(verb)scripts/build-instr-gen.py \
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$(verb-arg) \
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--simulator $(SIMULATOR) \
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--ibex-config $(IBEX_CONFIG) \
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--end-signature-addr $(SIGNATURE_ADDR) \
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--output $(BUILD-DIR)/instr-gen \
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--isa $(ISA)
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--output $(BUILD-DIR)/instr-gen
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$(call dump-vars,$(ig-build-vars-path),gen,$(instr-gen-build-var-deps))
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@touch $@
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@ -266,7 +262,7 @@ $(test-asms): \
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--end-signature-addr $(SIGNATURE_ADDR) \
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--output-dir $(@D) \
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--gen-build-dir $(BUILD-DIR)/instr-gen \
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--isa $(ISA) \
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--ibex-config $(IBEX_CONFIG) \
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--test-dot-seed $* \
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--pmp-num-regions $(PMP_REGIONS) \
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--pmp-granularity $(PMP_GRANULARITY)
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@ -294,7 +290,7 @@ $(test-bins): \
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$(verb-arg) \
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--input $(RUN-DIR)/$*/test.S \
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--output $@ \
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--isa $(ISA) \
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--ibex-config $(IBEX_CONFIG) \
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--test-dot-seed $*
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.PHONY: instr_gen_compile
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@ -315,10 +311,10 @@ $(iss-sim-logs): \
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$(RUN-DIR)/%/test.bin scripts/run-iss.py
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$(verb)scripts/run-iss.py \
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$(verb-arg) \
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--ibex-config $(IBEX_CONFIG) \
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--iss=$(ISS) \
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--input=$(RUN-DIR)/$*/test.o \
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--output=$@ \
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--isa=$(ISA_ISS)
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--output=$@
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.PHONY: iss_run
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iss_run: $(iss-sim-logs)
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@ -9,7 +9,7 @@ import os
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import shutil
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import sys
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from scripts_lib import run_one, start_riscv_dv_run_cmd
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from scripts_lib import run_one, start_riscv_dv_run_cmd, get_isas_for_config
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def main() -> int:
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@ -18,7 +18,7 @@ def main() -> int:
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parser.add_argument('--simulator', required=True)
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parser.add_argument('--end-signature-addr', required=True)
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parser.add_argument('--output', required=True)
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parser.add_argument('--isa', required=True)
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parser.add_argument('--ibex-config', required=True)
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args = parser.parse_args()
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@ -32,11 +32,13 @@ def main() -> int:
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os.makedirs(args.output, exist_ok=True)
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isa, iss_isa = get_isas_for_config(args.ibex_config)
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cmd = (start_riscv_dv_run_cmd(args.verbose) +
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['--co', '--steps=gen',
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'--simulator', args.simulator,
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'--output', args.output,
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'--isa', args.isa,
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'--isa', isa,
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'--end_signature_addr', args.end_signature_addr])
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log_path = os.path.join(args.output, 'build.log')
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@ -10,7 +10,8 @@ import shlex
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import sys
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import tempfile
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from scripts_lib import read_test_dot_seed, start_riscv_dv_run_cmd, run_one
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from scripts_lib import (read_test_dot_seed, start_riscv_dv_run_cmd,
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get_isas_for_config, run_one)
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def main() -> int:
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@ -18,13 +19,14 @@ def main() -> int:
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parser.add_argument('--verbose', action='store_true')
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parser.add_argument('--input', required=True)
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parser.add_argument('--output', required=True)
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parser.add_argument('--isa', required=True)
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parser.add_argument('--ibex-config', required=True)
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parser.add_argument('--test-dot-seed',
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type=read_test_dot_seed, required=True)
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args = parser.parse_args()
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isa, iss_isa = get_isas_for_config(args.ibex_config)
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testname, seed = args.test_dot_seed
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if not args.output.endswith('.bin'):
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@ -51,7 +53,7 @@ def main() -> int:
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'--test', testname,
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'--start_seed', str(seed),
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'--iterations', '1',
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'--isa', args.isa,
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'--isa', isa,
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'--debug', orig_list],
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redirect_stdstreams=out_riscv_dv_path)
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if dv_ret:
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@ -13,7 +13,8 @@ import sys
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import tempfile
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from typing import List
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from scripts_lib import read_test_dot_seed, start_riscv_dv_run_cmd, run_one
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from scripts_lib import (read_test_dot_seed, start_riscv_dv_run_cmd,
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get_isas_for_config, run_one)
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def main() -> int:
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@ -23,7 +24,7 @@ def main() -> int:
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parser.add_argument('--end-signature-addr', required=True)
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parser.add_argument('--output-dir', required=True)
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parser.add_argument('--gen-build-dir', required=True)
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parser.add_argument('--isa', required=True)
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parser.add_argument('--ibex-config', required=True)
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parser.add_argument('--test-dot-seed',
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type=read_test_dot_seed, required=True)
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@ -33,6 +34,8 @@ def main() -> int:
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args = parser.parse_args()
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isa, iss_isa = get_isas_for_config(args.ibex_config)
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testname, seed = args.test_dot_seed
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inst_overrides = [
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@ -65,7 +68,7 @@ def main() -> int:
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['--so', '--steps=gen',
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'--output', placeholder,
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'--simulator', args.simulator,
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'--isa', args.isa,
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'--isa', isa,
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'--test', testname,
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'--start_seed', str(seed),
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'--iterations', '1',
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@ -8,7 +8,7 @@ import argparse
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import os
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import sys
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from scripts_lib import run_one
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from scripts_lib import get_isas_for_config, run_one
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def main() -> int:
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@ -17,10 +17,12 @@ def main() -> int:
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parser.add_argument('--iss', required=True)
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parser.add_argument('--input', required=True)
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parser.add_argument('--output', required=True)
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parser.add_argument('--isa', required=True)
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parser.add_argument('--ibex-config', required=True)
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args = parser.parse_args()
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isa, iss_isa = get_isas_for_config(args.ibex_config)
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# riscv-dv knows how to run an ISS simulation (see yaml/iss.yaml in the
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# vendored directory), but it has definite (and inconvenient!) opinions
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# about where files should end up. Rather than fight with it, let's just
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@ -39,7 +41,7 @@ def main() -> int:
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else:
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spike = 'spike'
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cmd = [spike, '--log-commits', '--isa', args.isa, '-l', args.input]
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cmd = [spike, '--log-commits', '--isa', iss_isa, '-l', args.input]
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return run_one(args.verbose,
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cmd,
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redirect_stdstreams=args.output)
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@ -12,10 +12,17 @@ import sys
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from typing import Dict, List, Optional, Tuple
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THIS_DIR = os.path.dirname(__file__)
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IBEX_ROOT = os.path.join(THIS_DIR, 4 * '../')
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IBEX_ROOT = os.path.normpath(os.path.join(THIS_DIR, 4 * '../'))
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RISCV_DV_ROOT = os.path.normpath(os.path.join(IBEX_ROOT,
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'vendor/google_riscv-dv'))
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_OLD_SYS_PATH = sys.path
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try:
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sys.path = [os.path.join(IBEX_ROOT, 'util')] + sys.path
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from ibex_config import parse_config
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finally:
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sys.path = _OLD_SYS_PATH
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TestAndSeed = Tuple[str, int]
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@ -99,3 +106,28 @@ def read_test_dot_seed(arg: str) -> TestAndSeed:
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.format(arg))
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return (match.group(1), int(match.group(2), 10))
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def get_isas_for_config(ibex_cfg: str) -> Tuple[str, str]:
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'''Get ISA and ISS_ISA keys for the given Ibex config'''
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yaml_path = os.path.join(IBEX_ROOT, "ibex_configs.yaml")
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cfg = parse_config(ibex_cfg, yaml_path)
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# NOTE: This logic should match the code in the get_isa_string() function
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# in core_ibex/tests/core_ibex_base_test.sv: keep them in sync!
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has_multiplier = cfg.rv32m != 'ibex_pkg::RV32MNone'
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base_isa = 'rv32{}{}c'.format('e' if cfg.rv32e else 'i',
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'm' if has_multiplier else '')
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bitmanip_mapping = {
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'ibex_pkg::RV32BNone': [],
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'ibex_pkg::RV32BBalanced': ['Zba', 'Zbb', 'Zbs', 'Xbitmanip'],
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'ibex_pkg::RV32BOTEarlGrey': ['Zba', 'Zbb', 'Zbc', 'Zbs', 'Xbitmanip'],
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'ibex_pkg::RV32BFull': ['Zba', 'Zbb', 'Zbc', 'Zbs', 'Xbitmanip'],
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}
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bitmanip_isa = bitmanip_mapping.get(cfg.rv32b)
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if bitmanip_isa is None:
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raise ValueError(f'Unknown RV32B value ({cfg.rv32b}) in config YAML')
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return (base_isa, '_'.join([base_isa] + bitmanip_isa))
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@ -39,6 +39,8 @@ class core_ibex_base_test extends uvm_test;
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irq_collected_port = new("irq_collected_port_test", this);
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endfunction
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// NOTE: This logic should match the code in the get_isas_for_config() function in
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// core_ibex/scripts/scripts_lib.py: keep them in sync!
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function string get_isa_string();
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bit RV32E;
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rv32m_e RV32M;
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