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[dv] Rename stored copy of run phase

Browse source 
In UVM 1.2, at least, uvm_component (a base class of
core_ibex_base_test) still has a method called run(). Ironically, this
has been renamed to "run_phase" to avoid conflicting with user names,
but the old-style phase names still exist at the moment.

Rename our copy of the phase object to cur_run_phase, which doesn't
conflict. Also, set it back to null at the end of the run_phase()
task. We shouldn't ever use it afterwards, and it's probably a good
idea to explode with a null object error if we do.
This commit is contained in:
Rupert Swarbrick 2021-01-27 12:10:17 +00:00 • committed by Rupert Swarbrick
parent 8d43b854ab
commit f291d1beb9
2 changed files with 12 additions and 11 deletions
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13
dv/uvm/core_ibex/tests/core_ibex_base_test.sv
View file

@ -23,7 +23,7 @@ class core_ibex_base_test extends uvm_test;
bit[ibex_mem_intf_agent_pkg::DATA_WIDTH-1:0] signature_data;
uvm_tlm_analysis_fifo #(ibex_mem_intf_seq_item) item_collected_port;
uvm_tlm_analysis_fifo #(irq_seq_item) irq_collected_port;
uvm_phase run;
uvm_phase cur_run_phase;
`uvm_component_utils(core_ibex_base_test)
@ -73,13 +73,14 @@ class core_ibex_base_test extends uvm_test;
virtual task run_phase(uvm_phase phase);
enable_irq_seq = cfg.enable_irq_single_seq || cfg.enable_irq_multiple_seq;
phase.raise_objection(this);
run = phase;
cur_run_phase = phase;
dut_vif.dut_cb.fetch_enable <= 1'b0;
clk_vif.wait_clks(100);
load_binary_to_mem();
dut_vif.dut_cb.fetch_enable <= 1'b1;
send_stimulus();
wait_for_test_done();
cur_run_phase = null;
phase.drop_objection(this);
endtask
@ -195,7 +196,7 @@ class core_ibex_base_test extends uvm_test;
// type, throws uvm_error on mismatch
virtual task check_next_core_status(core_status_t core_status, string error_msg = "",
int timeout = 9999999);
run.raise_objection(this);
cur_run_phase.raise_objection(this);
fork
begin
wait_for_mem_txn(cfg.signature_addr, CORE_STATUS);
@ -211,13 +212,13 @@ class core_ibex_base_test extends uvm_test;
join_any
// Will only get here if we successfully beat the timeout period
disable fork;
run.drop_objection(this);
cur_run_phase.drop_objection(this);
endtask
// Waits for a write to the address of the specified CSR and retrieves the csr data
virtual task wait_for_csr_write(csr_num_e csr, int timeout = 9999999);
bit [11:0] csr_addr;
run.raise_objection(this);
cur_run_phase.raise_objection(this);
fork
begin
do begin
@ -235,7 +236,7 @@ class core_ibex_base_test extends uvm_test;
join_any
// Will only get here if we successfully beat the timeout period
disable fork;
run.drop_objection(this);
cur_run_phase.drop_objection(this);
endtask
// Waits until the next time the given core_status is written to the signature address

10
dv/uvm/core_ibex/tests/core_ibex_test_lib.sv
View file

@ -325,7 +325,7 @@ class core_ibex_debug_intr_basic_test extends core_ibex_base_test;
// Task that waits for xRET to be asserted within a certain number of cycles
virtual task wait_ret(string ret, int timeout);
run.raise_objection(this);
cur_run_phase.raise_objection(this);
fork
begin
priv_lvl_e tgt_mode;
@ -351,7 +351,7 @@ class core_ibex_debug_intr_basic_test extends core_ibex_base_test;
join_any
// Will only get here if dret successfully detected within timeout period
disable fork;
run.drop_objection(this);
cur_run_phase.drop_objection(this);
endtask
virtual function void check_priv_mode(priv_lvl_e mode);
@ -406,8 +406,8 @@ class core_ibex_directed_test extends core_ibex_debug_intr_basic_test;
join_none
wait (dut_vif.dut_cb.ecall === 1'b1);
disable fork;
if (run.get_objection_count(this) > 1) begin
run.drop_objection(this);
if (cur_run_phase.get_objection_count(this) > 1) begin
cur_run_phase.drop_objection(this);
end
end
end
@ -1198,7 +1198,7 @@ class core_ibex_mem_error_test extends core_ibex_directed_test;
end
join
if (latched_imem_err === 1'b0) begin
run.drop_objection(this);
cur_run_phase.drop_objection(this);
inject_imem_error();
end
end while (latched_imem_err === 1'b0);