mirror of
https://github.com/lowRISC/ibex.git
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[pmp] Use top-level straps for PMP reset values
By using top-level straps for the PMP reset configuration its easier to implement different reset configurations if there are multiple Ibex cores in the system. Signed-off-by: Robert Schilling <rschilling@rivosinc.com>
This commit is contained in:
parent
4ed20f4ac3
commit
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8 changed files with 178 additions and 165 deletions
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@ -50,5 +50,5 @@ Custom Reset Values
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By default all PMP CSRs (include ``mseccfg``) are reset to 0.
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By default all PMP CSRs (include ``mseccfg``) are reset to 0.
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Some applications may want other reset values.
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Some applications may want other reset values.
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Default reset values are defined in :file:`ibex_pmp_reset_default.svh`.
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Default reset values are defined in :file:`ibex_pkg.sv`.
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An implementation can either modify this file or define ``IBEX_CUSTOM_PMP_RESET_VALUES`` and place a copy of :file:`ibex_pmp_result_default.svh` in a new file, :file:`ibex_pmp_reset.svh`, changing the values as required and adding the new file to the include path of whatever build flow is being used.
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An implementation can either modify this file or pass custom reset values as a module parameter.
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@ -36,7 +36,6 @@ filesets:
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- rtl/ibex_wb_stage.sv
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- rtl/ibex_wb_stage.sv
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- rtl/ibex_dummy_instr.sv
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- rtl/ibex_dummy_instr.sv
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- rtl/ibex_core.sv
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- rtl/ibex_core.sv
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- rtl/ibex_pmp_reset_default.svh: {is_include_file: true}
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file_type: systemVerilogSource
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file_type: systemVerilogSource
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files_lint_verilator:
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files_lint_verilator:
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@ -14,35 +14,38 @@
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* Top level module of the ibex RISC-V core
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* Top level module of the ibex RISC-V core
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*/
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*/
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module ibex_core import ibex_pkg::*; #(
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module ibex_core import ibex_pkg::*; #(
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parameter bit PMPEnable = 1'b0,
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parameter bit PMPEnable = 1'b0,
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parameter int unsigned PMPGranularity = 0,
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parameter int unsigned PMPGranularity = 0,
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parameter int unsigned PMPNumRegions = 4,
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parameter int unsigned PMPNumRegions = 4,
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parameter int unsigned MHPMCounterNum = 0,
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parameter ibex_pkg::pmp_cfg_t PMPRstCfg[16] = ibex_pkg::PmpCfgRst,
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parameter int unsigned MHPMCounterWidth = 40,
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parameter logic [33:0] PMPRstAddr[16] = ibex_pkg::PmpAddrRst,
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parameter bit RV32E = 1'b0,
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parameter ibex_pkg::pmp_mseccfg_t PMPRstMsecCfg = ibex_pkg::PmpMseccfgRst,
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parameter rv32m_e RV32M = RV32MFast,
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parameter int unsigned MHPMCounterNum = 0,
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parameter rv32b_e RV32B = RV32BNone,
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parameter int unsigned MHPMCounterWidth = 40,
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parameter bit BranchTargetALU = 1'b0,
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parameter bit RV32E = 1'b0,
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parameter bit WritebackStage = 1'b0,
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parameter rv32m_e RV32M = RV32MFast,
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parameter bit ICache = 1'b0,
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parameter rv32b_e RV32B = RV32BNone,
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parameter bit ICacheECC = 1'b0,
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parameter bit BranchTargetALU = 1'b0,
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parameter int unsigned BusSizeECC = BUS_SIZE,
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parameter bit WritebackStage = 1'b0,
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parameter int unsigned TagSizeECC = IC_TAG_SIZE,
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parameter bit ICache = 1'b0,
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parameter int unsigned LineSizeECC = IC_LINE_SIZE,
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parameter bit ICacheECC = 1'b0,
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parameter bit BranchPredictor = 1'b0,
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parameter int unsigned BusSizeECC = BUS_SIZE,
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parameter bit DbgTriggerEn = 1'b0,
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parameter int unsigned TagSizeECC = IC_TAG_SIZE,
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parameter int unsigned DbgHwBreakNum = 1,
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parameter int unsigned LineSizeECC = IC_LINE_SIZE,
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parameter bit ResetAll = 1'b0,
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parameter bit BranchPredictor = 1'b0,
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parameter lfsr_seed_t RndCnstLfsrSeed = RndCnstLfsrSeedDefault,
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parameter bit DbgTriggerEn = 1'b0,
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parameter lfsr_perm_t RndCnstLfsrPerm = RndCnstLfsrPermDefault,
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parameter int unsigned DbgHwBreakNum = 1,
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parameter bit SecureIbex = 1'b0,
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parameter bit ResetAll = 1'b0,
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parameter bit DummyInstructions = 1'b0,
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parameter lfsr_seed_t RndCnstLfsrSeed = RndCnstLfsrSeedDefault,
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parameter bit RegFileECC = 1'b0,
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parameter lfsr_perm_t RndCnstLfsrPerm = RndCnstLfsrPermDefault,
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parameter int unsigned RegFileDataWidth = 32,
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parameter bit SecureIbex = 1'b0,
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parameter bit MemECC = 1'b0,
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parameter bit DummyInstructions= 1'b0,
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parameter int unsigned MemDataWidth = MemECC ? 32 + 7 : 32,
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parameter bit RegFileECC = 1'b0,
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parameter int unsigned DmHaltAddr = 32'h1A110800,
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parameter int unsigned RegFileDataWidth = 32,
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parameter int unsigned DmExceptionAddr = 32'h1A110808
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parameter bit MemECC = 1'b0,
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parameter int unsigned MemDataWidth = MemECC ? 32 + 7 : 32,
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parameter int unsigned DmHaltAddr = 32'h1A110800,
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parameter int unsigned DmExceptionAddr = 32'h1A110808
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) (
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) (
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// Clock and Reset
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// Clock and Reset
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input logic clk_i,
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input logic clk_i,
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@ -1049,6 +1052,9 @@ module ibex_core import ibex_pkg::*; #(
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.PMPEnable (PMPEnable),
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.PMPEnable (PMPEnable),
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.PMPGranularity (PMPGranularity),
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.PMPGranularity (PMPGranularity),
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.PMPNumRegions (PMPNumRegions),
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.PMPNumRegions (PMPNumRegions),
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.PMPRstCfg (PMPRstCfg),
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.PMPRstAddr (PMPRstAddr),
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.PMPRstMsecCfg (PMPRstMsecCfg),
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.RV32E (RV32E),
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.RV32E (RV32E),
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.RV32M (RV32M),
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.RV32M (RV32M),
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.RV32B (RV32B)
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.RV32B (RV32B)
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@ -10,20 +10,23 @@
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`include "prim_assert.sv"
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`include "prim_assert.sv"
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module ibex_cs_registers #(
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module ibex_cs_registers #(
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parameter bit DbgTriggerEn = 0,
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parameter bit DbgTriggerEn = 0,
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parameter int unsigned DbgHwBreakNum = 1,
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parameter int unsigned DbgHwBreakNum = 1,
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parameter bit DataIndTiming = 1'b0,
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parameter bit DataIndTiming = 1'b0,
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parameter bit DummyInstructions = 1'b0,
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parameter bit DummyInstructions = 1'b0,
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parameter bit ShadowCSR = 1'b0,
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parameter bit ShadowCSR = 1'b0,
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parameter bit ICache = 1'b0,
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parameter bit ICache = 1'b0,
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parameter int unsigned MHPMCounterNum = 10,
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parameter int unsigned MHPMCounterNum = 10,
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parameter int unsigned MHPMCounterWidth = 40,
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parameter int unsigned MHPMCounterWidth = 40,
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parameter bit PMPEnable = 0,
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parameter bit PMPEnable = 0,
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parameter int unsigned PMPGranularity = 0,
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parameter int unsigned PMPGranularity = 0,
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parameter int unsigned PMPNumRegions = 4,
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parameter int unsigned PMPNumRegions = 4,
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parameter bit RV32E = 0,
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parameter ibex_pkg::pmp_cfg_t PMPRstCfg[16] = ibex_pkg::PmpCfgRst,
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parameter ibex_pkg::rv32m_e RV32M = ibex_pkg::RV32MFast,
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parameter logic [33:0] PMPRstAddr[16] = ibex_pkg::PmpAddrRst,
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parameter ibex_pkg::rv32b_e RV32B = ibex_pkg::RV32BNone
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parameter ibex_pkg::pmp_mseccfg_t PMPRstMsecCfg = ibex_pkg::PmpMseccfgRst,
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parameter bit RV32E = 0,
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parameter ibex_pkg::rv32m_e RV32M = ibex_pkg::RV32MFast,
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parameter ibex_pkg::rv32b_e RV32B = ibex_pkg::RV32BNone
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) (
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) (
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// Clock and Reset
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// Clock and Reset
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input logic clk_i,
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input logic clk_i,
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@ -1073,13 +1076,6 @@ module ibex_cs_registers #(
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// -----------------
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// -----------------
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if (PMPEnable) begin : g_pmp_registers
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if (PMPEnable) begin : g_pmp_registers
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// PMP reset values
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`ifdef IBEX_CUSTOM_PMP_RESET_VALUES
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`include "ibex_pmp_reset.svh"
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`else
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`include "ibex_pmp_reset_default.svh"
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`endif
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pmp_mseccfg_t pmp_mseccfg_q, pmp_mseccfg_d;
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pmp_mseccfg_t pmp_mseccfg_q, pmp_mseccfg_d;
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logic pmp_mseccfg_we;
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logic pmp_mseccfg_we;
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logic pmp_mseccfg_err;
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logic pmp_mseccfg_err;
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@ -1168,7 +1164,7 @@ module ibex_cs_registers #(
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ibex_csr #(
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ibex_csr #(
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.Width ($bits(pmp_cfg_t)),
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.Width ($bits(pmp_cfg_t)),
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.ShadowCopy(ShadowCSR),
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.ShadowCopy(ShadowCSR),
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.ResetValue(pmp_cfg_rst[i])
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.ResetValue(PMPRstCfg[i])
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) u_pmp_cfg_csr (
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) u_pmp_cfg_csr (
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.clk_i (clk_i),
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.clk_i (clk_i),
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.rst_ni (rst_ni),
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.rst_ni (rst_ni),
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@ -1203,7 +1199,7 @@ module ibex_cs_registers #(
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ibex_csr #(
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ibex_csr #(
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.Width (PMPAddrWidth),
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.Width (PMPAddrWidth),
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.ShadowCopy(ShadowCSR),
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.ShadowCopy(ShadowCSR),
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.ResetValue(pmp_addr_rst[i][33-:PMPAddrWidth])
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.ResetValue(PMPRstAddr[i][33-:PMPAddrWidth])
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) u_pmp_addr_csr (
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) u_pmp_addr_csr (
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.clk_i (clk_i),
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.clk_i (clk_i),
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.rst_ni (rst_ni),
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.rst_ni (rst_ni),
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@ -1213,7 +1209,7 @@ module ibex_cs_registers #(
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.rd_error_o(pmp_addr_err[i])
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.rd_error_o(pmp_addr_err[i])
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);
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);
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`ASSERT_INIT(PMPAddrRstLowBitsZero_A, pmp_addr_rst[i][33-PMPAddrWidth:0] == '0)
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`ASSERT_INIT(PMPAddrRstLowBitsZero_A, PMPRstAddr[i][33-PMPAddrWidth:0] == '0)
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assign csr_pmp_cfg_o[i] = pmp_cfg[i];
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assign csr_pmp_cfg_o[i] = pmp_cfg[i];
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assign csr_pmp_addr_o[i] = {pmp_addr_rdata[i], 2'b00};
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assign csr_pmp_addr_o[i] = {pmp_addr_rdata[i], 2'b00};
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@ -1236,7 +1232,7 @@ module ibex_cs_registers #(
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ibex_csr #(
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ibex_csr #(
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.Width ($bits(pmp_mseccfg_t)),
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.Width ($bits(pmp_mseccfg_t)),
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.ShadowCopy(ShadowCSR),
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.ShadowCopy(ShadowCSR),
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.ResetValue(pmp_mseccfg_rst)
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.ResetValue(PMPRstMsecCfg)
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) u_pmp_mseccfg (
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) u_pmp_mseccfg (
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.clk_i (clk_i),
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.clk_i (clk_i),
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.rst_ni (rst_ni),
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.rst_ni (rst_ni),
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@ -9,36 +9,39 @@
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// SEC_CM: LOGIC.SHADOW
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// SEC_CM: LOGIC.SHADOW
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module ibex_lockstep import ibex_pkg::*; #(
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module ibex_lockstep import ibex_pkg::*; #(
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parameter int unsigned LockstepOffset = 2,
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parameter int unsigned LockstepOffset = 2,
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parameter bit PMPEnable = 1'b0,
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parameter bit PMPEnable = 1'b0,
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parameter int unsigned PMPGranularity = 0,
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parameter int unsigned PMPGranularity = 0,
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parameter int unsigned PMPNumRegions = 4,
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parameter int unsigned PMPNumRegions = 4,
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parameter int unsigned MHPMCounterNum = 0,
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parameter ibex_pkg::pmp_cfg_t PMPRstCfg[16] = ibex_pkg::PmpCfgRst,
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parameter int unsigned MHPMCounterWidth = 40,
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parameter logic [33:0] PMPRstAddr[16] = ibex_pkg::PmpAddrRst,
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parameter bit RV32E = 1'b0,
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parameter ibex_pkg::pmp_mseccfg_t PMPRstMsecCfg = ibex_pkg::PmpMseccfgRst,
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parameter rv32m_e RV32M = RV32MFast,
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parameter int unsigned MHPMCounterNum = 0,
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parameter rv32b_e RV32B = RV32BNone,
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parameter int unsigned MHPMCounterWidth = 40,
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parameter bit BranchTargetALU = 1'b0,
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parameter bit RV32E = 1'b0,
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parameter bit WritebackStage = 1'b0,
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parameter rv32m_e RV32M = RV32MFast,
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parameter bit ICache = 1'b0,
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parameter rv32b_e RV32B = RV32BNone,
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parameter bit ICacheECC = 1'b0,
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parameter bit BranchTargetALU = 1'b0,
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parameter int unsigned BusSizeECC = BUS_SIZE,
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parameter bit WritebackStage = 1'b0,
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parameter int unsigned TagSizeECC = IC_TAG_SIZE,
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parameter bit ICache = 1'b0,
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parameter int unsigned LineSizeECC = IC_LINE_SIZE,
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parameter bit ICacheECC = 1'b0,
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parameter bit BranchPredictor = 1'b0,
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parameter int unsigned BusSizeECC = BUS_SIZE,
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parameter bit DbgTriggerEn = 1'b0,
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parameter int unsigned TagSizeECC = IC_TAG_SIZE,
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parameter int unsigned DbgHwBreakNum = 1,
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parameter int unsigned LineSizeECC = IC_LINE_SIZE,
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parameter bit ResetAll = 1'b0,
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parameter bit BranchPredictor = 1'b0,
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parameter lfsr_seed_t RndCnstLfsrSeed = RndCnstLfsrSeedDefault,
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parameter bit DbgTriggerEn = 1'b0,
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parameter lfsr_perm_t RndCnstLfsrPerm = RndCnstLfsrPermDefault,
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parameter int unsigned DbgHwBreakNum = 1,
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parameter bit SecureIbex = 1'b0,
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parameter bit ResetAll = 1'b0,
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parameter bit DummyInstructions = 1'b0,
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parameter lfsr_seed_t RndCnstLfsrSeed = RndCnstLfsrSeedDefault,
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parameter bit RegFileECC = 1'b0,
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parameter lfsr_perm_t RndCnstLfsrPerm = RndCnstLfsrPermDefault,
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parameter int unsigned RegFileDataWidth = 32,
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parameter bit SecureIbex = 1'b0,
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parameter bit MemECC = 1'b0,
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parameter bit DummyInstructions = 1'b0,
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parameter int unsigned MemDataWidth = MemECC ? 32 + 7 : 32,
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parameter bit RegFileECC = 1'b0,
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parameter int unsigned DmHaltAddr = 32'h1A110800,
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parameter int unsigned RegFileDataWidth = 32,
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parameter int unsigned DmExceptionAddr = 32'h1A110808
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parameter bit MemECC = 1'b0,
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parameter int unsigned MemDataWidth = MemECC ? 32 + 7 : 32,
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parameter int unsigned DmHaltAddr = 32'h1A110800,
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parameter int unsigned DmExceptionAddr = 32'h1A110808
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) (
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) (
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input logic clk_i,
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input logic clk_i,
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input logic rst_ni,
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input logic rst_ni,
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@ -347,6 +350,9 @@ module ibex_lockstep import ibex_pkg::*; #(
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.PMPEnable ( PMPEnable ),
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.PMPEnable ( PMPEnable ),
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.PMPGranularity ( PMPGranularity ),
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.PMPGranularity ( PMPGranularity ),
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.PMPNumRegions ( PMPNumRegions ),
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.PMPNumRegions ( PMPNumRegions ),
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.PMPRstCfg ( PMPRstCfg ),
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.PMPRstAddr ( PMPRstAddr ),
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.PMPRstMsecCfg ( PMPRstMsecCfg ),
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.MHPMCounterNum ( MHPMCounterNum ),
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.MHPMCounterNum ( MHPMCounterNum ),
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.MHPMCounterWidth ( MHPMCounterWidth ),
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.MHPMCounterWidth ( MHPMCounterWidth ),
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.RV32E ( RV32E ),
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.RV32E ( RV32E ),
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@ -664,4 +664,54 @@ package ibex_pkg;
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// and core_busy signals within `ibex_core` may need adjusting.
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// and core_busy signals within `ibex_core` may need adjusting.
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parameter ibex_mubi_t IbexMuBiOn = 4'b0101;
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parameter ibex_mubi_t IbexMuBiOn = 4'b0101;
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parameter ibex_mubi_t IbexMuBiOff = 4'b1010;
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parameter ibex_mubi_t IbexMuBiOff = 4'b1010;
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// Default reset values for PMP CSRs. Where the number of regions
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// (PMPNumRegions) is less than 16 the reset values for the higher numbered
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// regions are ignored.
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//
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// See the Ibex Reference Guide (Custom Reset Values under Physical Memory
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// Protection) for more information.
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parameter pmp_cfg_t PmpCfgRst[16] = '{
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 0
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 1
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 2
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 3
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 4
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 5
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 6
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 7
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 8
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 9
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 10
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 11
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 12
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 13
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'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 14
|
||||||
|
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0} // region 15
|
||||||
|
};
|
||||||
|
|
||||||
|
// Addresses are given in byte granularity for readibility. A minimum of two
|
||||||
|
// bits will be stripped off the bottom (PMPGranularity == 0) with more stripped
|
||||||
|
// off at coarser granularities.
|
||||||
|
parameter logic [33:0] PmpAddrRst[16] = '{
|
||||||
|
34'h0, // region 0
|
||||||
|
34'h0, // region 1
|
||||||
|
34'h0, // region 2
|
||||||
|
34'h0, // region 3
|
||||||
|
34'h0, // region 4
|
||||||
|
34'h0, // region 5
|
||||||
|
34'h0, // region 6
|
||||||
|
34'h0, // region 7
|
||||||
|
34'h0, // region 8
|
||||||
|
34'h0, // region 9
|
||||||
|
34'h0, // region 10
|
||||||
|
34'h0, // region 11
|
||||||
|
34'h0, // region 12
|
||||||
|
34'h0, // region 13
|
||||||
|
34'h0, // region 14
|
||||||
|
34'h0 // region 15
|
||||||
|
};
|
||||||
|
|
||||||
|
parameter pmp_mseccfg_t PmpMseccfgRst = '{rlb : 1'b0, mmwp: 1'b0, mml: 1'b0};
|
||||||
endpackage
|
endpackage
|
||||||
|
|
|
@ -1,53 +0,0 @@
|
||||||
// Copyright lowRISC contributors.
|
|
||||||
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
|
|
||||||
// SPDX-License-Identifier: Apache-2.0
|
|
||||||
|
|
||||||
// Default reset values for PMP CSRs. Where the number of regions
|
|
||||||
// (PMPNumRegions) is less than 16 the reset values for the higher numbered
|
|
||||||
// regions are ignored.
|
|
||||||
//
|
|
||||||
// See the Ibex Reference Guide (Custom Reset Values under Physical Memory
|
|
||||||
// Protection) for more information.
|
|
||||||
|
|
||||||
localparam pmp_cfg_t pmp_cfg_rst[16] = '{
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 0
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 1
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 2
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 3
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 4
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 5
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 6
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 7
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 8
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 9
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 10
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 11
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 12
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 13
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0}, // region 14
|
|
||||||
'{lock: 1'b0, mode: PMP_MODE_OFF, exec: 1'b0, write: 1'b0, read: 1'b0} // region 15
|
|
||||||
};
|
|
||||||
|
|
||||||
// Addresses are given in byte granularity for readibility. A minimum of two
|
|
||||||
// bits will be stripped off the bottom (PMPGranularity == 0) with more stripped
|
|
||||||
// off at coarser granularities.
|
|
||||||
localparam [33:0] pmp_addr_rst[16] = '{
|
|
||||||
34'h0, // region 0
|
|
||||||
34'h0, // region 1
|
|
||||||
34'h0, // region 2
|
|
||||||
34'h0, // region 3
|
|
||||||
34'h0, // region 4
|
|
||||||
34'h0, // region 5
|
|
||||||
34'h0, // region 6
|
|
||||||
34'h0, // region 7
|
|
||||||
34'h0, // region 8
|
|
||||||
34'h0, // region 9
|
|
||||||
34'h0, // region 10
|
|
||||||
34'h0, // region 11
|
|
||||||
34'h0, // region 12
|
|
||||||
34'h0, // region 13
|
|
||||||
34'h0, // region 14
|
|
||||||
34'h0 // region 15
|
|
||||||
};
|
|
||||||
|
|
||||||
localparam pmp_mseccfg_t pmp_mseccfg_rst = '{rlb : 1'b0, mmwp: 1'b0, mml: 1'b0};
|
|
|
@ -13,32 +13,35 @@
|
||||||
* Top level module of the ibex RISC-V core
|
* Top level module of the ibex RISC-V core
|
||||||
*/
|
*/
|
||||||
module ibex_top import ibex_pkg::*; #(
|
module ibex_top import ibex_pkg::*; #(
|
||||||
parameter bit PMPEnable = 1'b0,
|
parameter bit PMPEnable = 1'b0,
|
||||||
parameter int unsigned PMPGranularity = 0,
|
parameter int unsigned PMPGranularity = 0,
|
||||||
parameter int unsigned PMPNumRegions = 4,
|
parameter int unsigned PMPNumRegions = 4,
|
||||||
parameter int unsigned MHPMCounterNum = 0,
|
parameter int unsigned MHPMCounterNum = 0,
|
||||||
parameter int unsigned MHPMCounterWidth = 40,
|
parameter int unsigned MHPMCounterWidth = 40,
|
||||||
parameter bit RV32E = 1'b0,
|
parameter ibex_pkg::pmp_cfg_t PMPRstCfg[16] = ibex_pkg::PmpCfgRst,
|
||||||
parameter rv32m_e RV32M = RV32MFast,
|
parameter logic [33:0] PMPRstAddr[16] = ibex_pkg::PmpAddrRst,
|
||||||
parameter rv32b_e RV32B = RV32BNone,
|
parameter ibex_pkg::pmp_mseccfg_t PMPRstMsecCfg = ibex_pkg::PmpMseccfgRst,
|
||||||
parameter regfile_e RegFile = RegFileFF,
|
parameter bit RV32E = 1'b0,
|
||||||
parameter bit BranchTargetALU = 1'b0,
|
parameter rv32m_e RV32M = RV32MFast,
|
||||||
parameter bit WritebackStage = 1'b0,
|
parameter rv32b_e RV32B = RV32BNone,
|
||||||
parameter bit ICache = 1'b0,
|
parameter regfile_e RegFile = RegFileFF,
|
||||||
parameter bit ICacheECC = 1'b0,
|
parameter bit BranchTargetALU = 1'b0,
|
||||||
parameter bit BranchPredictor = 1'b0,
|
parameter bit WritebackStage = 1'b0,
|
||||||
parameter bit DbgTriggerEn = 1'b0,
|
parameter bit ICache = 1'b0,
|
||||||
parameter int unsigned DbgHwBreakNum = 1,
|
parameter bit ICacheECC = 1'b0,
|
||||||
parameter bit SecureIbex = 1'b0,
|
parameter bit BranchPredictor = 1'b0,
|
||||||
parameter bit ICacheScramble = 1'b0,
|
parameter bit DbgTriggerEn = 1'b0,
|
||||||
parameter int unsigned ICacheScrNumPrinceRoundsHalf = 2,
|
parameter int unsigned DbgHwBreakNum = 1,
|
||||||
parameter lfsr_seed_t RndCnstLfsrSeed = RndCnstLfsrSeedDefault,
|
parameter bit SecureIbex = 1'b0,
|
||||||
parameter lfsr_perm_t RndCnstLfsrPerm = RndCnstLfsrPermDefault,
|
parameter bit ICacheScramble = 1'b0,
|
||||||
parameter int unsigned DmHaltAddr = 32'h1A110800,
|
parameter int unsigned ICacheScrNumPrinceRoundsHalf = 2,
|
||||||
parameter int unsigned DmExceptionAddr = 32'h1A110808,
|
parameter lfsr_seed_t RndCnstLfsrSeed = RndCnstLfsrSeedDefault,
|
||||||
|
parameter lfsr_perm_t RndCnstLfsrPerm = RndCnstLfsrPermDefault,
|
||||||
|
parameter int unsigned DmHaltAddr = 32'h1A110800,
|
||||||
|
parameter int unsigned DmExceptionAddr = 32'h1A110808,
|
||||||
// Default seed and nonce for scrambling
|
// Default seed and nonce for scrambling
|
||||||
parameter logic [SCRAMBLE_KEY_W-1:0] RndCnstIbexKey = RndCnstIbexKeyDefault,
|
parameter logic [SCRAMBLE_KEY_W-1:0] RndCnstIbexKey = RndCnstIbexKeyDefault,
|
||||||
parameter logic [SCRAMBLE_NONCE_W-1:0] RndCnstIbexNonce = RndCnstIbexNonceDefault
|
parameter logic [SCRAMBLE_NONCE_W-1:0] RndCnstIbexNonce = RndCnstIbexNonceDefault
|
||||||
) (
|
) (
|
||||||
// Clock and Reset
|
// Clock and Reset
|
||||||
input logic clk_i,
|
input logic clk_i,
|
||||||
|
@ -283,6 +286,9 @@ module ibex_top import ibex_pkg::*; #(
|
||||||
.PMPEnable (PMPEnable),
|
.PMPEnable (PMPEnable),
|
||||||
.PMPGranularity (PMPGranularity),
|
.PMPGranularity (PMPGranularity),
|
||||||
.PMPNumRegions (PMPNumRegions),
|
.PMPNumRegions (PMPNumRegions),
|
||||||
|
.PMPRstCfg (PMPRstCfg),
|
||||||
|
.PMPRstAddr (PMPRstAddr),
|
||||||
|
.PMPRstMsecCfg (PMPRstMsecCfg),
|
||||||
.MHPMCounterNum (MHPMCounterNum),
|
.MHPMCounterNum (MHPMCounterNum),
|
||||||
.MHPMCounterWidth (MHPMCounterWidth),
|
.MHPMCounterWidth (MHPMCounterWidth),
|
||||||
.RV32E (RV32E),
|
.RV32E (RV32E),
|
||||||
|
@ -984,6 +990,9 @@ module ibex_top import ibex_pkg::*; #(
|
||||||
.PMPEnable (PMPEnable),
|
.PMPEnable (PMPEnable),
|
||||||
.PMPGranularity (PMPGranularity),
|
.PMPGranularity (PMPGranularity),
|
||||||
.PMPNumRegions (PMPNumRegions),
|
.PMPNumRegions (PMPNumRegions),
|
||||||
|
.PMPRstCfg (PMPRstCfg),
|
||||||
|
.PMPRstAddr (PMPRstAddr),
|
||||||
|
.PMPRstMsecCfg (PMPRstMsecCfg),
|
||||||
.MHPMCounterNum (MHPMCounterNum),
|
.MHPMCounterNum (MHPMCounterNum),
|
||||||
.MHPMCounterWidth (MHPMCounterWidth),
|
.MHPMCounterWidth (MHPMCounterWidth),
|
||||||
.RV32E (RV32E),
|
.RV32E (RV32E),
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue