3 commits

Author	SHA1	Message	Date
Tom Roberts	44b033cf8b	[rtl] Add support for instruction fetch errors ... - Add required signals to top-level - Propagate error through fetch stages - Add new exception type - Update documentation for new exception type - Resolves issue #109	2019-08-09 10:44:37 +01:00
Philipp Wagner	e5bdf1ea9f	Document register map of compliance test system	2019-08-06 11:48:50 +01:00
Philipp Wagner	24a9c64bf1	Add simulation for RISC-V compliance testing ... This adds a Verilator simulation of Ibex for use in RISC-V Compliance Testing. In addition to ibex itself, the simulation contains a RAM and a memory-mapped helper module for the test software to interact with the outside world. The test framework uses this to dump a "test signature", which is written to a certain part of the memory, and to end the simulation. (In the future, this could be extended to include printf() like functionality.)	2019-08-05 15:49:15 +01:00