This commit makes the BASE field of the `mtvec` CSR writable to
allow changing the trap-vector base address at runtime without
changing the boot address input. Similar to the boot address,
the trap-vector base address must always be aligned to 256 bytes.
At bootup, the trap-vector base address is initialized to the boot
address.
This commit resolveslowrisc/ibex#118.
Most of this work has been done by @ivanmgribeiro as part of
lowrisc/ibex#193.
This adds Verilator lint support to our fusesoc core file. A waiver file
is created to waive all well-understood lint warnings. The UNOPTFLAT
warnings are not well understood at the moment, they are waived for now
and further discussion is expected to happen in a GH issue (referenced
in the waiver).
Run with
```
fusesoc --cores-root . run --target=lint lowrisc:ibex:ibex_core
```
The waiver file support requires edalize >= 0.1.5.
