Commit graph

6 commits

Author SHA1 Message Date
Rupert Swarbrick
a0c5f5e4d3 Remove initialisation for sim_finish in simulator_ctrl.sv
This initialisation causes Xcelium to complain about multiple drivers
for the variable. Which is rather confusing, but we don't actually
need to initialise it: the variable will be X at the start of time, so
the logic that stops the simulation if it gets big won't fire until
after reset anyway.
2023-07-13 11:49:47 +00:00
Philipp Wagner
67e7417749 Fix Verible lint issues
Fix all remaining issues reported by Verible lint.

It turns out that #965 undid some of the fixes in `ibex_alu.sv`
that were done in #980 around the `SHUFFLE_*`/`FLIP_*` signals.
2020-07-03 12:20:32 +01:00
Rupert Swarbrick
91d7721fa9 Make exiting from simple_system tests work with Spike 2020-03-02 15:45:47 +00:00
Mehrdad Biglari
cead186836 Add Synopsys VCS Support for Ibex Simple System
Add VCS to core description. Add stimuli. Fix compile error for assigmnet from multiple blocks.
2019-12-03 16:41:26 +00:00
Tobias Wölfel
6be1e8aff3 Delay simulator finish
The tracer needs time to log the final instruction.
Introduce a counter to delay calling the simulation finish.

Fixes lowrisc/ibex#468
2019-11-14 11:57:12 +00:00
Greg Chadwick
2041f10c69 Added simple system
Simple system is a basic verilator top-level testbench for running
 executables.  It has functionality for outputting text to a log file
 and for the software to terminate the simulation
2019-11-09 07:48:47 +00:00