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36 lines
1.5 KiB
C
36 lines
1.5 KiB
C
// Copyright lowRISC contributors.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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#ifndef COSIM_DPI_H_
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#define COSIM_DPI_H_
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#include <stdint.h>
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#include <svdpi.h>
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// This adapts the C++ interface of the `Cosim` class to be used via DPI. See
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// the documentation in cosim.h for further details
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extern "C" {
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int riscv_cosim_step(Cosim *cosim, const svBitVecVal *write_reg,
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const svBitVecVal *write_reg_data, const svBitVecVal *pc,
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svBit sync_trap);
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void riscv_cosim_set_mip(Cosim *cosim, const svBitVecVal *mip);
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void riscv_cosim_set_nmi(Cosim *cosim, svBit nmi);
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void riscv_cosim_set_debug_req(Cosim *cosim, svBit debug_req);
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void riscv_cosim_set_mcycle(Cosim *cosim, svBitVecVal *mcycle);
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void riscv_cosim_notify_dside_access(Cosim *cosim, svBit store,
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svBitVecVal *addr, svBitVecVal *data,
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svBitVecVal *be, svBit error,
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svBit misaligned_first,
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svBit misaligned_second);
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void riscv_cosim_set_iside_error(Cosim *cosim, svBitVecVal *addr);
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int riscv_cosim_get_num_errors(Cosim *cosim);
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const char *riscv_cosim_get_error(Cosim *cosim, int index);
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void riscv_cosim_clear_errors(Cosim *cosim);
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void riscv_cosim_write_mem_byte(Cosim *cosim, const svBitVecVal *addr,
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const svBitVecVal *d);
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int riscv_cosim_get_insn_cnt(Cosim *cosim);
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}
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#endif // COSIM_DPI_H_
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