ibex/formal/data_ind_timing
2022-10-04 13:59:39 +01:00
..
check_fast_div.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_fast_mulh.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_fast_mull.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_fast_rem.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_single_div.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_single_mulh.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_single_mull.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_single_rem.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_slow_div.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_slow_mulh.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_slow_mull.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
check_slow_rem.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
formal_tb.sv [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
formal_tb_frag.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
ibex_data_ind_timing.core [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
operation_div.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
operation_mulh.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
operation_mull.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
operation_rem.svh [formal] Add check for multdiv cycle consumption 2020-09-16 16:30:20 +01:00
README.md [formal] Remove build infrastructure for data independent timing 2022-10-04 13:59:39 +01:00

Data Independent Timing Assertions

We currently do not have a way to run these SystemVerilog assertions. However, we keep these files because they will be useful for future work.