mirror of
https://github.com/lowRISC/ibex.git
synced 2025-04-22 04:47:25 -04:00
f60d03b6b0
Update code from upstream repository https://github.com/chipsalliance/riscv-dv to revision 08b12066b34c9728f706e45098ba502a36d7ca59 Signed-off-by: Marno van der Maas <mvdmaas+git@lowrisc.org>
1166 lines
51 KiB
Python
1166 lines
51 KiB
Python
"""
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Copyright 2019 Google LLC
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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Regression script for RISC-V random instruction generator
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"""
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import argparse
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import os
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import random
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import re
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import sys
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import logging
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from scripts.lib import *
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from scripts.spike_log_to_trace_csv import *
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from scripts.ovpsim_log_to_trace_csv import *
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from scripts.whisper_log_trace_csv import *
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from scripts.sail_log_to_trace_csv import *
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from scripts.instr_trace_compare import *
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from types import SimpleNamespace
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LOGGER = logging.getLogger()
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class SeedGen:
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"""An object that will generate a pseudo-random seed for test iterations"""
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def __init__(self, start_seed, fixed_seed, seed_yaml):
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# These checks are performed with proper error messages at argument
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# parsing time, but it can't hurt to do a belt-and-braces check here too.
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assert fixed_seed is None or start_seed is None
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self.fixed_seed = fixed_seed
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self.start_seed = start_seed
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self.rerun_seed = {} if seed_yaml is None else read_yaml(seed_yaml)
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def get(self, test_id, test_iter):
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"""Get the seed to use for the given test and iteration"""
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if test_id in self.rerun_seed:
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# Note that test_id includes the iteration index (well, the batch
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# index, at any rate), so this makes sense even if test_iter > 0.
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return self.rerun_seed[test_id]
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if self.fixed_seed is not None:
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# Checked at argument parsing time
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assert test_iter == 0
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return self.fixed_seed
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if self.start_seed is not None:
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return self.start_seed + test_iter
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# If the user didn't specify seeds in some way, we generate a random
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# seed every time
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return random.getrandbits(31)
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def get_generator_cmd(simulator, simulator_yaml, cov, exp, debug_cmd):
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""" Setup the compile and simulation command for the generator
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Args:
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simulator : RTL/pyflow simulator used to run instruction generator
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simulator_yaml : RTL/pyflow simulator configuration file in YAML format
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cov : Enable functional coverage
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exp : Use experimental version
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debug_cmd : Produce the debug cmd log without running
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Returns:
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compile_cmd : RTL/pyflow simulator command to compile the instruction
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generator
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sim_cmd : RTL/pyflow simulator command to run the instruction
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generator
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"""
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logging.info("Processing simulator setup file : {}".format(simulator_yaml))
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yaml_data = read_yaml(simulator_yaml)
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# Search for matched simulator
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for entry in yaml_data:
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if entry['tool'] == simulator:
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logging.info("Found matching simulator: {}".format(entry['tool']))
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if simulator == "pyflow":
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compile_cmd = ""
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else:
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compile_spec = entry['compile']
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compile_cmd = compile_spec['cmd']
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for i in range(len(compile_cmd)):
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if ('cov_opts' in compile_spec) and cov:
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compile_cmd[i] = re.sub('<cov_opts>', compile_spec[
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'cov_opts'].rstrip(), compile_cmd[i])
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else:
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compile_cmd[i] = re.sub('<cov_opts>', '',
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compile_cmd[i])
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if exp:
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compile_cmd[i] += " +define+EXPERIMENTAL "
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sim_cmd = entry['sim']['cmd']
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if ('cov_opts' in entry['sim']) and cov:
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sim_cmd = re.sub('<cov_opts>',
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entry['sim']['cov_opts'].rstrip(), sim_cmd)
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else:
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sim_cmd = re.sub('<cov_opts>', '', sim_cmd)
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if 'env_var' in entry:
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for env_var in entry['env_var'].split(','):
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for i in range(len(compile_cmd)):
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compile_cmd[i] = re.sub(
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"<" + env_var + ">", get_env_var(env_var, debug_cmd=debug_cmd),
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compile_cmd[i])
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sim_cmd = re.sub(
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"<" + env_var + ">", get_env_var(env_var, debug_cmd=debug_cmd),
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sim_cmd)
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return compile_cmd, sim_cmd
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logging.error("Cannot find simulator {}".format(simulator))
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sys.exit(RET_FAIL)
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def parse_iss_yaml(iss, iss_yaml, isa, setting_dir, debug_cmd):
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"""Parse ISS YAML to get the simulation command
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Args:
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iss : target ISS used to look up in ISS YAML
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iss_yaml : ISS configuration file in YAML format
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isa : ISA variant passed to the ISS
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setting_dir : Generator setting directory
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debug_cmd : Produce the debug cmd log without running
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Returns:
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cmd : ISS run command
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"""
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logging.info("Processing ISS setup file : {}".format(iss_yaml))
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yaml_data = read_yaml(iss_yaml)
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# Path to the "scripts" subdirectory
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my_path = os.path.dirname(os.path.realpath(__file__))
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scripts_dir = os.path.join(my_path, "scripts") # Search for matched ISS
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# Search for matched ISS
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for entry in yaml_data:
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if entry['iss'] == iss:
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logging.info("Found matching ISS: {}".format(entry['iss']))
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cmd = entry['cmd'].rstrip()
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cmd = re.sub("\<path_var\>",
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get_env_var(entry['path_var'], debug_cmd=debug_cmd),
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cmd)
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m = re.search(r"rv(?P<xlen>[0-9]+?)(?P<variant>[a-zA-Z_]+?)$", isa)
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if m:
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cmd = re.sub("\<xlen\>", m.group('xlen'), cmd)
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else:
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logging.error("Illegal ISA {}".format(isa))
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if iss == "ovpsim":
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cmd = re.sub("\<cfg_path\>", setting_dir, cmd)
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elif iss == "whisper":
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if m:
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# TODO: Support u/s mode
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variant = re.sub('g', 'imafd', m.group('variant'))
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cmd = re.sub("\<variant\>", variant, cmd)
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else:
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cmd = re.sub("\<variant\>", isa, cmd)
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cmd = re.sub("\<scripts_path\>", scripts_dir, cmd)
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return cmd
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logging.error("Cannot find ISS {}".format(iss))
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sys.exit(RET_FAIL)
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def get_iss_cmd(base_cmd, elf, log):
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"""Get the ISS simulation command
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Args:
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base_cmd : Original command template
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elf : ELF file to run ISS simualtion
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log : ISS simulation log name
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Returns:
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cmd : Command for ISS simulation
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"""
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cmd = re.sub("\<elf\>", elf, base_cmd)
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cmd += (" &> {}".format(log))
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return cmd
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def do_compile(compile_cmd, test_list, core_setting_dir, cwd, ext_dir,
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cmp_opts, output_dir, debug_cmd, lsf_cmd):
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"""Compile the instruction generator
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Args:
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compile_cmd : Compile command for the generator
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test_list : List of assembly programs to be compiled
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core_setting_dir : Path for riscv_core_setting.sv
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cwd : Filesystem path to RISCV-DV repo
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ext_dir : User extension directory
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cmp_opts : Compile options for the generator
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output_dir : Output directory of the ELF files
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debug_cmd : Produce the debug cmd log without running
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lsf_cmd : LSF command used to run the instruction generator
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"""
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if not ((len(test_list) == 1) and (
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test_list[0]['test'] == 'riscv_csr_test')):
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logging.info("Building RISC-V instruction generator")
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for cmd in compile_cmd:
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cmd = re.sub("<out>", os.path.abspath(output_dir), cmd)
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cmd = re.sub("<setting>", core_setting_dir, cmd)
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if ext_dir == "":
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cmd = re.sub("<user_extension>", "<cwd>/user_extension", cmd)
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else:
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cmd = re.sub("<user_extension>", ext_dir, cmd)
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cmd = re.sub("<cwd>", cwd, cmd)
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cmd = re.sub("<cmp_opts>", cmp_opts, cmd)
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if lsf_cmd:
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cmd = lsf_cmd + " " + cmd
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run_parallel_cmd([cmd], debug_cmd=debug_cmd)
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else:
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logging.debug("Compile command: {}".format(cmd))
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run_cmd(cmd, debug_cmd=debug_cmd)
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def run_csr_test(cmd_list, cwd, csr_file, isa, iterations, lsf_cmd,
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end_signature_addr, timeout_s, output_dir, debug_cmd):
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"""Run CSR test
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It calls a separate python script to generate directed CSR test code,
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located at scripts/gen_csr_test.py.
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"""
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cmd = "python3 " + cwd + "/scripts/gen_csr_test.py" + \
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(" --csr_file {}".format(csr_file)) + \
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(" --xlen {}".format(
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re.search(r"(?P<xlen>[0-9]+)", isa).group("xlen"))) + \
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(" --iterations {}".format(iterations)) + \
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(" --out {}/asm_test".format(output_dir)) + \
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(" --end_signature_addr {}".format(end_signature_addr))
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if lsf_cmd:
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cmd_list.append(cmd)
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else:
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run_cmd(cmd, timeout_s, debug_cmd=debug_cmd)
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def do_simulate(sim_cmd, simulator, test_list, cwd, sim_opts, seed_gen,
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csr_file,
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isa, end_signature_addr, lsf_cmd, timeout_s, log_suffix,
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batch_size, output_dir, verbose, check_return_code, debug_cmd, target):
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"""Run the instruction generator
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Args:
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sim_cmd : Simulate command for the generator
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simulator : simulator used to run instruction generator
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test_list : List of assembly programs to be compiled
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cwd : Filesystem path to RISCV-DV repo
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sim_opts : Simulation options for the generator
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seed_gen : A SeedGen seed generator
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csr_file : YAML file containing description of all CSRs
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isa : Processor supported ISA subset
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end_signature_addr : Address that tests will write pass/fail signature to at end of test
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lsf_cmd : LSF command used to run the instruction generator
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timeout_s : Timeout limit in seconds
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log_suffix : Simulation log file name suffix
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batch_size : Number of tests to generate per run
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output_dir : Output directory of the ELF files
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verbose : Verbose logging
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check_return_code : Check return code of the command
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debug_cmd : Produce the debug cmd log without running
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"""
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cmd_list = []
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sim_cmd = re.sub("<out>", os.path.abspath(output_dir), sim_cmd)
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sim_cmd = re.sub("<cwd>", cwd, sim_cmd)
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sim_cmd = re.sub("<sim_opts>", sim_opts, sim_cmd)
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logging.info("Running RISC-V instruction generator")
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sim_seed = {}
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for test in test_list:
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iterations = test['iterations']
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logging.info("Generating {} {}".format(iterations, test['test']))
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if iterations > 0:
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# Running a CSR test
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if test['test'] == 'riscv_csr_test':
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run_csr_test(cmd_list, cwd, csr_file, isa, iterations, lsf_cmd,
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end_signature_addr, timeout_s, output_dir,
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debug_cmd)
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else:
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batch_cnt = 1
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if batch_size > 0:
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batch_cnt = int((iterations + batch_size - 1) / batch_size)
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logging.info(
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"Running {} with {} batches".format(test['test'],
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batch_cnt))
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for i in range(0, batch_cnt):
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test_id = '{}_{}'.format(test['test'], i)
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rand_seed = seed_gen.get(test_id, i * batch_cnt)
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if i < batch_cnt - 1:
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test_cnt = batch_size
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else:
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test_cnt = iterations - i * batch_size
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if simulator == "pyflow":
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sim_cmd = re.sub("<test_name>", test['gen_test'],
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sim_cmd)
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cmd = lsf_cmd + " " + sim_cmd.rstrip() + \
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(" --num_of_tests={}".format(test_cnt)) + \
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(" --start_idx={}".format(i * batch_size)) + \
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(" --asm_file_name={}/asm_test/{}".format(
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output_dir, test['test'])) + \
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(" --log_file_name={}/sim_{}_{}{}.log ".format(
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output_dir,
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test['test'], i, log_suffix)) + \
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(" --target=%s " % (target)) + \
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(" --gen_test=%s " % (test['gen_test'])) + \
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(" --seed={} ".format(rand_seed))
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else:
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cmd = lsf_cmd + " " + sim_cmd.rstrip() + \
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(" +UVM_TESTNAME={} ".format(test['gen_test'])) + \
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(" +num_of_tests={} ".format(test_cnt)) + \
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(" +start_idx={} ".format(i * batch_size)) + \
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(" +asm_file_name={}/asm_test/{} ".format(
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output_dir, test['test'])) + \
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(" -l {}/sim_{}_{}{}.log ".format(
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output_dir, test['test'], i, log_suffix))
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if verbose and simulator != "pyflow":
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cmd += "+UVM_VERBOSITY=UVM_HIGH "
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cmd = re.sub("<seed>", str(rand_seed), cmd)
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cmd = re.sub("<test_id>", test_id, cmd)
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sim_seed[test_id] = str(rand_seed)
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if "gen_opts" in test:
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if simulator == "pyflow":
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test['gen_opts'] = re.sub("\+", "--",
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test['gen_opts'])
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cmd += test['gen_opts']
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else:
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cmd += test['gen_opts']
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if not re.search("c", isa):
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cmd += "+disable_compressed_instr=1 "
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if lsf_cmd:
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cmd_list.append(cmd)
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else:
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logging.info(
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"Running {}, batch {}/{}, test_cnt:{}".format(
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test['test'], i + 1, batch_cnt, test_cnt))
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run_cmd(cmd, timeout_s,
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check_return_code=check_return_code,
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debug_cmd=debug_cmd)
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if sim_seed:
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with open(('{}/seed.yaml'.format(os.path.abspath(output_dir))),
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'w') as outfile:
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yaml.dump(sim_seed, outfile, default_flow_style=False)
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if lsf_cmd:
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run_parallel_cmd(cmd_list, timeout_s,
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check_return_code=check_return_code,
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debug_cmd=debug_cmd)
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def gen(test_list, argv, output_dir, cwd):
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"""Run the instruction generator
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Args:
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test_list : List of assembly programs to be compiled
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argv : Configuration arguments
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output_dir : Output directory of the ELF files
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cwd : Filesystem path to RISCV-DV repo
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"""
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check_return_code = True
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if argv.simulator == "ius":
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# Incisive return non-zero return code even test passes
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check_return_code = False
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logging.debug(
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"Disable return_code checking for {}".format(argv.simulator))
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# Mutually exclusive options between compile_only and sim_only
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if argv.co and argv.so:
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logging.error("argument -co is not allowed with argument -so")
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return
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if argv.co == 0 and len(test_list) == 0:
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return
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# Setup the compile and simulation command for the generator
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compile_cmd, sim_cmd = get_generator_cmd(argv.simulator,
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argv.simulator_yaml, argv.cov,
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argv.exp, argv.debug)
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# Compile the instruction generator
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# No compilation process in pyflow simulator
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if not argv.so:
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do_compile(compile_cmd, test_list, argv.core_setting_dir, cwd,
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argv.user_extension_dir,
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argv.cmp_opts, output_dir, argv.debug, argv.lsf_cmd)
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# Run the instruction generator
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if not argv.co:
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seed_gen = SeedGen(argv.start_seed, argv.seed, argv.seed_yaml)
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if argv.simulator == 'pyflow':
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"""Default timeout of Pyflow is 20 minutes, if the user
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doesn't specified their own gen_timeout value from CMD
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"""
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if argv.gen_timeout == 360:
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gen_timeout = 1200
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else:
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gen_timeout = argv.gen_timeout
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else:
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gen_timeout = argv.gen_timeout
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do_simulate(sim_cmd, argv.simulator, test_list, cwd, argv.sim_opts,
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seed_gen,
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argv.csr_yaml, argv.isa, argv.end_signature_addr,
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argv.lsf_cmd,
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gen_timeout, argv.log_suffix, argv.batch_size,
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output_dir,
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argv.verbose, check_return_code, argv.debug, argv.target)
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def gcc_compile(test_list, output_dir, isa, mabi, opts, debug_cmd):
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"""Use riscv gcc toolchain to compile the assembly program
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Args:
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test_list : List of assembly programs to be compiled
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output_dir : Output directory of the ELF files
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isa : ISA variant passed to GCC
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mabi : MABI variant passed to GCC
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debug_cmd : Produce the debug cmd log without running
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"""
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cwd = os.path.dirname(os.path.realpath(__file__))
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for test in test_list:
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for i in range(0, test['iterations']):
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if 'no_gcc' in test and test['no_gcc'] == 1:
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continue
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prefix = ("{}/asm_test/{}_{}".format(output_dir, test['test'], i))
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asm = prefix + ".S"
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elf = prefix + ".o"
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binary = prefix + ".bin"
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test_isa = isa
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if not os.path.isfile(asm) and not debug_cmd:
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logging.error("Cannot find assembly test: {}\n".format(asm))
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sys.exit(RET_FAIL)
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# gcc compilation
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cmd = ("{} -static -mcmodel=medany \
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-fvisibility=hidden -nostdlib \
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-nostartfiles {} \
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-I{}/user_extension \
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-T{}/scripts/link.ld {} -o {} ".format(
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get_env_var("RISCV_GCC", debug_cmd=debug_cmd), asm, cwd,
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cwd, opts, elf))
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if 'gcc_opts' in test:
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cmd += test['gcc_opts']
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if 'gen_opts' in test:
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# Disable compressed instruction
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if re.search('disable_compressed_instr', test['gen_opts']):
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test_isa = re.sub("c", "", test_isa)
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# If march/mabi is not defined in the test gcc_opts, use the default
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# setting from the command line.
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if not re.search('march', cmd):
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cmd += (" -march={}".format(test_isa))
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if not re.search('mabi', cmd):
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cmd += (" -mabi={}".format(mabi))
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logging.info("Compiling {}".format(asm))
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run_cmd_output(cmd.split(), debug_cmd=debug_cmd)
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# Convert the ELF to plain binary, used in RTL sim
|
|
logging.info("Converting to {}".format(binary))
|
|
cmd = ("{} -O binary {} {}".format(
|
|
get_env_var("RISCV_OBJCOPY", debug_cmd=debug_cmd), elf, binary))
|
|
run_cmd_output(cmd.split(), debug_cmd=debug_cmd)
|
|
|
|
|
|
def run_assembly(asm_test, iss_yaml, isa, mabi, gcc_opts, iss_opts, output_dir,
|
|
setting_dir, debug_cmd):
|
|
"""Run a directed assembly test with ISS
|
|
|
|
Args:
|
|
asm_test : Assembly test file
|
|
iss_yaml : ISS configuration file in YAML format
|
|
isa : ISA variant passed to the ISS
|
|
mabi : MABI variant passed to GCC
|
|
gcc_opts : User-defined options for GCC compilation
|
|
iss_opts : Instruction set simulators
|
|
output_dir : Output directory of compiled test files
|
|
setting_dir : Generator setting directory
|
|
debug_cmd : Produce the debug cmd log without running
|
|
"""
|
|
if not asm_test.endswith(".S"):
|
|
logging.error("{} is not an assembly .S file".format(asm_test))
|
|
return
|
|
cwd = os.path.dirname(os.path.realpath(__file__))
|
|
asm_test = os.path.expanduser(asm_test)
|
|
report = ("{}/iss_regr.log".format(output_dir)).rstrip()
|
|
asm = re.sub(r"^.*\/", "", asm_test)
|
|
asm = re.sub(r"\.S$", "", asm)
|
|
prefix = ("{}/directed_asm_test/{}".format(output_dir, asm))
|
|
elf = prefix + ".o"
|
|
binary = prefix + ".bin"
|
|
iss_list = iss_opts.split(",")
|
|
run_cmd("mkdir -p {}/directed_asm_test".format(output_dir))
|
|
logging.info("Compiling assembly test : {}".format(asm_test))
|
|
|
|
# gcc compilation
|
|
cmd = ("{} -static -mcmodel=medany \
|
|
-fvisibility=hidden -nostdlib \
|
|
-nostartfiles {} \
|
|
-I{}/user_extension \
|
|
-T{}/scripts/link.ld {} -o {} ".format(
|
|
get_env_var("RISCV_GCC", debug_cmd=debug_cmd), asm_test, cwd,
|
|
cwd, gcc_opts, elf))
|
|
cmd += (" -march={}".format(isa))
|
|
cmd += (" -mabi={}".format(mabi))
|
|
run_cmd_output(cmd.split(), debug_cmd=debug_cmd)
|
|
# Convert the ELF to plain binary, used in RTL sim
|
|
logging.info("Converting to {}".format(binary))
|
|
cmd = ("{} -O binary {} {}".format(
|
|
get_env_var("RISCV_OBJCOPY", debug_cmd=debug_cmd), elf, binary))
|
|
run_cmd_output(cmd.split(), debug_cmd=debug_cmd)
|
|
log_list = []
|
|
# ISS simulation
|
|
for iss in iss_list:
|
|
run_cmd("mkdir -p {}/{}_sim".format(output_dir, iss))
|
|
log = ("{}/{}_sim/{}.log".format(output_dir, iss, asm))
|
|
log_list.append(log)
|
|
base_cmd = parse_iss_yaml(iss, iss_yaml, isa, setting_dir, debug_cmd)
|
|
logging.info("[{}] Running ISS simulation: {}".format(iss, elf))
|
|
cmd = get_iss_cmd(base_cmd, elf, log)
|
|
run_cmd(cmd, 10, debug_cmd=debug_cmd)
|
|
logging.info("[{}] Running ISS simulation: {} ...done".format(iss, elf))
|
|
if len(iss_list) == 2:
|
|
compare_iss_log(iss_list, log_list, report)
|
|
|
|
|
|
def run_assembly_from_dir(asm_test_dir, iss_yaml, isa, mabi, gcc_opts, iss,
|
|
output_dir, setting_dir, debug_cmd):
|
|
"""Run a directed assembly test from a directory with spike
|
|
|
|
Args:
|
|
asm_test_dir : Assembly test file directory
|
|
iss_yaml : ISS configuration file in YAML format
|
|
isa : ISA variant passed to the ISS
|
|
mabi : MABI variant passed to GCC
|
|
gcc_opts : User-defined options for GCC compilation
|
|
iss : Instruction set simulators
|
|
output_dir : Output directory of compiled test files
|
|
setting_dir : Generator setting directory
|
|
debug_cmd : Produce the debug cmd log without running
|
|
"""
|
|
result = run_cmd("find {} -name \"*.S\"".format(asm_test_dir))
|
|
if result:
|
|
asm_list = result.splitlines()
|
|
logging.info("Found {} assembly tests under {}".format(
|
|
len(asm_list), asm_test_dir))
|
|
for asm_file in asm_list:
|
|
run_assembly(asm_file, iss_yaml, isa, mabi, gcc_opts, iss,
|
|
output_dir,
|
|
setting_dir, debug_cmd)
|
|
if "," in iss:
|
|
report = ("{}/iss_regr.log".format(output_dir)).rstrip()
|
|
save_regr_report(report)
|
|
else:
|
|
logging.error(
|
|
"No assembly test(*.S) found under {}".format(asm_test_dir))
|
|
|
|
|
|
def run_c(c_test, iss_yaml, isa, mabi, gcc_opts, iss_opts, output_dir,
|
|
setting_dir, debug_cmd):
|
|
"""Run a directed c test with ISS
|
|
|
|
Args:
|
|
c_test : C test file
|
|
iss_yaml : ISS configuration file in YAML format
|
|
isa : ISA variant passed to the ISS
|
|
mabi : MABI variant passed to GCC
|
|
gcc_opts : User-defined options for GCC compilation
|
|
iss_opts : Instruction set simulators
|
|
output_dir : Output directory of compiled test files
|
|
setting_dir : Generator setting directory
|
|
debug_cmd : Produce the debug cmd log without running
|
|
"""
|
|
if not c_test.endswith(".c"):
|
|
logging.error("{} is not a .c file".format(c_test))
|
|
return
|
|
cwd = os.path.dirname(os.path.realpath(__file__))
|
|
c_test = os.path.expanduser(c_test)
|
|
report = ("{}/iss_regr.log".format(output_dir)).rstrip()
|
|
c = re.sub(r"^.*\/", "", c_test)
|
|
c = re.sub(r"\.c$", "", c)
|
|
prefix = ("{}/directed_c_test/{}".format(output_dir, c))
|
|
elf = prefix + ".o"
|
|
binary = prefix + ".bin"
|
|
iss_list = iss_opts.split(",")
|
|
run_cmd("mkdir -p {}/directed_c_test".format(output_dir))
|
|
logging.info("Compiling c test : {}".format(c_test))
|
|
|
|
# gcc compilation
|
|
cmd = ("{} -mcmodel=medany -nostdlib \
|
|
-nostartfiles {} \
|
|
-I{}/user_extension \
|
|
-T{}/scripts/link.ld {} -o {} ".format(
|
|
get_env_var("RISCV_GCC", debug_cmd=debug_cmd), c_test, cwd,
|
|
cwd, gcc_opts, elf))
|
|
cmd += (" -march={}".format(isa))
|
|
cmd += (" -mabi={}".format(mabi))
|
|
run_cmd_output(cmd.split(), debug_cmd=debug_cmd)
|
|
# Convert the ELF to plain binary, used in RTL sim
|
|
logging.info("Converting to {}".format(binary))
|
|
cmd = ("{} -O binary {} {}".format(
|
|
get_env_var("RISCV_OBJCOPY", debug_cmd=debug_cmd), elf, binary))
|
|
run_cmd_output(cmd.split(), debug_cmd=debug_cmd)
|
|
log_list = []
|
|
# ISS simulation
|
|
for iss in iss_list:
|
|
run_cmd("mkdir -p {}/{}_sim".format(output_dir, iss))
|
|
log = ("{}/{}_sim/{}.log".format(output_dir, iss, c))
|
|
log_list.append(log)
|
|
base_cmd = parse_iss_yaml(iss, iss_yaml, isa, setting_dir, debug_cmd)
|
|
logging.info("[{}] Running ISS simulation: {}".format(iss, elf))
|
|
cmd = get_iss_cmd(base_cmd, elf, log)
|
|
run_cmd(cmd, 10, debug_cmd=debug_cmd)
|
|
logging.info("[{}] Running ISS simulation: {} ...done".format(iss, elf))
|
|
if len(iss_list) == 2:
|
|
compare_iss_log(iss_list, log_list, report)
|
|
|
|
|
|
def run_c_from_dir(c_test_dir, iss_yaml, isa, mabi, gcc_opts, iss,
|
|
output_dir, setting_dir, debug_cmd):
|
|
"""Run a directed c test from a directory with spike
|
|
|
|
Args:
|
|
c_test_dir : C test file directory
|
|
iss_yaml : ISS configuration file in YAML format
|
|
isa : ISA variant passed to the ISS
|
|
mabi : MABI variant passed to GCC
|
|
gcc_opts : User-defined options for GCC compilation
|
|
iss : Instruction set simulators
|
|
output_dir : Output directory of compiled test files
|
|
setting_dir : Generator setting directory
|
|
debug_cmd : Produce the debug cmd log without running
|
|
"""
|
|
result = run_cmd("find {} -name \"*.c\"".format(c_test_dir))
|
|
if result:
|
|
c_list = result.splitlines()
|
|
logging.info("Found {} c tests under {}".format(len(c_list), c_test_dir))
|
|
for c_file in c_list:
|
|
run_c(c_file, iss_yaml, isa, mabi, gcc_opts, iss, output_dir,
|
|
setting_dir, debug_cmd)
|
|
if "," in iss:
|
|
report = ("{}/iss_regr.log".format(output_dir)).rstrip()
|
|
save_regr_report(report)
|
|
else:
|
|
logging.error("No c test(*.c) found under {}".format(c_test_dir))
|
|
|
|
|
|
def iss_sim(test_list, output_dir, iss_list, iss_yaml, iss_opts,
|
|
isa, setting_dir, timeout_s, debug_cmd):
|
|
"""Run ISS simulation with the generated test program
|
|
|
|
Args:
|
|
test_list : List of assembly programs to be compiled
|
|
output_dir : Output directory of the ELF files
|
|
iss_list : List of instruction set simulators
|
|
iss_yaml : ISS configuration file in YAML format
|
|
iss_opts : ISS command line options
|
|
isa : ISA variant passed to the ISS
|
|
setting_dir : Generator setting directory
|
|
timeout_s : Timeout limit in seconds
|
|
debug_cmd : Produce the debug cmd log without running
|
|
"""
|
|
for iss in iss_list.split(","):
|
|
log_dir = ("{}/{}_sim".format(output_dir, iss))
|
|
base_cmd = parse_iss_yaml(iss, iss_yaml, isa, setting_dir, debug_cmd)
|
|
logging.info("{} sim log dir: {}".format(iss, log_dir))
|
|
run_cmd_output(["mkdir", "-p", log_dir])
|
|
for test in test_list:
|
|
if 'no_iss' in test and test['no_iss'] == 1:
|
|
continue
|
|
else:
|
|
for i in range(0, test['iterations']):
|
|
prefix = ("{}/asm_test/{}_{}".format(
|
|
output_dir, test['test'], i))
|
|
elf = prefix + ".o"
|
|
log = ("{}/{}_{}.log".format(log_dir, test['test'], i))
|
|
cmd = get_iss_cmd(base_cmd, elf, log)
|
|
if 'iss_opts' in test:
|
|
cmd += ' '
|
|
cmd += test['iss_opts']
|
|
logging.info("Running {} sim: {}".format(iss, elf))
|
|
if iss == "ovpsim":
|
|
run_cmd(cmd, timeout_s, debug_cmd=debug_cmd)
|
|
else:
|
|
run_cmd(cmd, timeout_s, debug_cmd=debug_cmd)
|
|
logging.debug(cmd)
|
|
|
|
|
|
def iss_cmp(test_list, iss, output_dir, stop_on_first_error, exp, debug_cmd):
|
|
"""Compare ISS simulation reult
|
|
|
|
Args:
|
|
test_list : List of assembly programs to be compiled
|
|
iss : List of instruction set simulators
|
|
output_dir : Output directory of the ELF files
|
|
stop_on_first_error : will end run on first error detected
|
|
exp : Use experimental version
|
|
debug_cmd : Produce the debug cmd log without running
|
|
"""
|
|
if debug_cmd:
|
|
return
|
|
iss_list = iss.split(",")
|
|
if len(iss_list) != 2:
|
|
return
|
|
report = ("{}/iss_regr.log".format(output_dir)).rstrip()
|
|
run_cmd("rm -rf {}".format(report))
|
|
for test in test_list:
|
|
for i in range(0, test['iterations']):
|
|
elf = ("{}/asm_test/{}_{}.o".format(output_dir, test['test'], i))
|
|
logging.info("Comparing ISS sim result {}/{} : {}".format(
|
|
iss_list[0], iss_list[1], elf))
|
|
log_list = []
|
|
run_cmd(("echo 'Test binary: {}' >> {}".format(elf, report)))
|
|
for iss in iss_list:
|
|
log_list.append(
|
|
"{}/{}_sim/{}.{}.log".format(output_dir, iss, test['test'], i))
|
|
compare_iss_log(iss_list, log_list, report, stop_on_first_error,
|
|
exp)
|
|
save_regr_report(report)
|
|
|
|
|
|
def compare_iss_log(iss_list, log_list, report, stop_on_first_error=0,
|
|
exp=False):
|
|
if len(iss_list) != 2 or len(log_list) != 2:
|
|
logging.error("Only support comparing two ISS logs")
|
|
else:
|
|
csv_list = []
|
|
for i in range(2):
|
|
log = log_list[i]
|
|
csv = log.replace(".log", ".csv")
|
|
iss = iss_list[i]
|
|
csv_list.append(csv)
|
|
if iss == "spike":
|
|
process_spike_sim_log(log, csv)
|
|
elif iss == "ovpsim":
|
|
process_ovpsim_sim_log(log, csv, stop_on_first_error)
|
|
elif iss == "sail":
|
|
process_sail_sim_log(log, csv)
|
|
elif iss == "whisper":
|
|
process_whisper_sim_log(log, csv)
|
|
else:
|
|
logging.error("Unsupported ISS {}".format(iss))
|
|
sys.exit(RET_FAIL)
|
|
result = compare_trace_csv(csv_list[0], csv_list[1], iss_list[0],
|
|
iss_list[1], report)
|
|
logging.info(result)
|
|
|
|
|
|
def save_regr_report(report):
|
|
passed_cnt = run_cmd("grep PASSED {} | wc -l".format(report)).strip()
|
|
failed_cnt = run_cmd("grep FAILED {} | wc -l".format(report)).strip()
|
|
summary = ("{} PASSED, {} FAILED".format(passed_cnt, failed_cnt))
|
|
logging.info(summary)
|
|
run_cmd(("echo {} >> {}".format(summary, report)))
|
|
logging.info("ISS regression report is saved to {}".format(report))
|
|
|
|
|
|
def read_seed(arg):
|
|
"""Read --seed or --seed_start"""
|
|
try:
|
|
seed = int(arg)
|
|
if seed < 0:
|
|
raise ValueError('bad seed')
|
|
return seed
|
|
|
|
except ValueError:
|
|
raise argparse.ArgumentTypeError('Bad seed ({}): '
|
|
'must be a non-negative integer.'
|
|
.format(arg))
|
|
|
|
|
|
def parse_args(cwd):
|
|
"""Create a command line parser.
|
|
|
|
Returns: The created parser.
|
|
"""
|
|
# Parse input arguments
|
|
parser = argparse.ArgumentParser()
|
|
|
|
parser.add_argument("--target", type=str, default="rv32imc",
|
|
help="Run the generator with pre-defined targets: \
|
|
rv32imc, rv32i, rv32imafdc, rv64imc, rv64gc, \
|
|
rv64imafdc")
|
|
parser.add_argument("-o", "--output", type=str,
|
|
help="Output directory name", dest="o")
|
|
parser.add_argument("-tl", "--testlist", type=str, default="",
|
|
help="Regression testlist", dest="testlist")
|
|
parser.add_argument("-tn", "--test", type=str, default="all",
|
|
help="Test name, 'all' means all tests in the list",
|
|
dest="test")
|
|
parser.add_argument("-i", "--iterations", type=int, default=0,
|
|
help="Override the iteration count in the test list",
|
|
dest="iterations")
|
|
parser.add_argument("-si", "--simulator", type=str, default="vcs",
|
|
help="Simulator used to run the generator, default VCS",
|
|
dest="simulator")
|
|
parser.add_argument("--iss", type=str, default="spike",
|
|
help="RISC-V instruction set simulator: spike,ovpsim,sail")
|
|
parser.add_argument("-v", "--verbose", dest="verbose", action="store_true",
|
|
default=False,
|
|
help="Verbose logging")
|
|
parser.add_argument("--co", dest="co", action="store_true", default=False,
|
|
help="Compile the generator only")
|
|
parser.add_argument("--cov", dest="cov", action="store_true", default=False,
|
|
help="Enable functional coverage")
|
|
parser.add_argument("--so", dest="so", action="store_true", default=False,
|
|
help="Simulate the generator only")
|
|
parser.add_argument("--cmp_opts", type=str, default="",
|
|
help="Compile options for the generator")
|
|
parser.add_argument("--sim_opts", type=str, default="",
|
|
help="Simulation options for the generator")
|
|
parser.add_argument("--gcc_opts", type=str, default="",
|
|
help="GCC compile options")
|
|
parser.add_argument("-s", "--steps", type=str, default="all",
|
|
help="Run steps: gen,gcc_compile,iss_sim,iss_cmp",
|
|
dest="steps")
|
|
parser.add_argument("--lsf_cmd", type=str, default="",
|
|
help="LSF command. Run in local sequentially if lsf \
|
|
command is not specified")
|
|
parser.add_argument("--isa", type=str, default="",
|
|
help="RISC-V ISA subset")
|
|
parser.add_argument("-m", "--mabi", type=str, default="",
|
|
help="mabi used for compilation", dest="mabi")
|
|
parser.add_argument("--gen_timeout", type=int, default=360,
|
|
help="Generator timeout limit in seconds")
|
|
parser.add_argument("--end_signature_addr", type=str, default="0",
|
|
help="Address that privileged CSR test writes to at EOT")
|
|
parser.add_argument("--iss_opts", type=str, default="",
|
|
help="Any ISS command line arguments")
|
|
parser.add_argument("--iss_timeout", type=int, default=10,
|
|
help="ISS sim timeout limit in seconds")
|
|
parser.add_argument("--iss_yaml", type=str, default="",
|
|
help="ISS setting YAML")
|
|
parser.add_argument("--simulator_yaml", type=str, default="",
|
|
help="RTL/pyflow simulator setting YAML")
|
|
parser.add_argument("--csr_yaml", type=str, default="",
|
|
help="CSR description file")
|
|
parser.add_argument("-ct", "--custom_target", type=str, default="",
|
|
help="Directory name of the custom target")
|
|
parser.add_argument("-cs", "--core_setting_dir", type=str, default="",
|
|
help="Path for the riscv_core_setting.sv")
|
|
parser.add_argument("-ext", "--user_extension_dir", type=str, default="",
|
|
help="Path for the user extension directory")
|
|
parser.add_argument("--asm_test", type=str, default="",
|
|
help="Directed assembly tests")
|
|
parser.add_argument("--c_test", type=str, default="",
|
|
help="Directed c tests")
|
|
parser.add_argument("--log_suffix", type=str, default="",
|
|
help="Simulation log name suffix")
|
|
parser.add_argument("--exp", action="store_true", default=False,
|
|
help="Run generator with experimental features")
|
|
parser.add_argument("-bz", "--batch_size", type=int, default=0,
|
|
help="Number of tests to generate per run. You can split a big"
|
|
" job to small batches with this option")
|
|
parser.add_argument("--stop_on_first_error", dest="stop_on_first_error",
|
|
action="store_true", default=False,
|
|
help="Stop on detecting first error")
|
|
parser.add_argument("--noclean", action="store_true", default=True,
|
|
help="Do not clean the output of the previous runs")
|
|
parser.add_argument("--verilog_style_check", action="store_true",
|
|
default=False,
|
|
help="Run verilog style check")
|
|
parser.add_argument("-d", "--debug", type=str, default="",
|
|
help="Generate debug command log file")
|
|
|
|
rsg = parser.add_argument_group('Random seeds',
|
|
'To control random seeds, use at most one '
|
|
'of the --start_seed, --seed or --seed_yaml '
|
|
'arguments. Since the latter two only give '
|
|
'a single seed for each test, they imply '
|
|
'--iterations=1.')
|
|
|
|
rsg.add_argument("--start_seed", type=read_seed,
|
|
help=("Randomization seed to use for first iteration of "
|
|
"each test. Subsequent iterations use seeds "
|
|
"counting up from there. Cannot be used with "
|
|
"--seed or --seed_yaml."))
|
|
rsg.add_argument("--seed", type=read_seed,
|
|
help=("Randomization seed to use for each test. "
|
|
"Implies --iterations=1. Cannot be used with "
|
|
"--start_seed or --seed_yaml."))
|
|
rsg.add_argument("--seed_yaml", type=str,
|
|
help=("Rerun the generator with the seed specification "
|
|
"from a prior regression. Implies --iterations=1. "
|
|
"Cannot be used with --start_seed or --seed."))
|
|
|
|
args = parser.parse_args()
|
|
|
|
if args.seed is not None and args.start_seed is not None:
|
|
logging.error('--start_seed and --seed are mutually exclusive.')
|
|
sys.exit(RET_FAIL)
|
|
|
|
if args.seed is not None:
|
|
if args.iterations == 0:
|
|
args.iterations = 1
|
|
elif args.iterations > 1:
|
|
logging.error('--seed is incompatible with setting --iterations '
|
|
'greater than 1.')
|
|
sys.exit(RET_FAIL)
|
|
|
|
# We've parsed all the arguments from the command line; default values
|
|
# can be set in the config file. Read that here.
|
|
load_config(args, cwd)
|
|
|
|
return args
|
|
|
|
|
|
def load_config(args, cwd):
|
|
"""
|
|
Load configuration from the command line and the configuration file.
|
|
Args:
|
|
args: Parsed command-line configuration
|
|
Returns:
|
|
Loaded configuration dictionary.
|
|
"""
|
|
if args.debug:
|
|
args.debug = open(args.debug, "w")
|
|
if not args.csr_yaml:
|
|
args.csr_yaml = cwd + "/yaml/csr_template.yaml"
|
|
|
|
if not args.iss_yaml:
|
|
args.iss_yaml = cwd + "/yaml/iss.yaml"
|
|
|
|
if not args.simulator_yaml:
|
|
args.simulator_yaml = cwd + "/yaml/simulator.yaml"
|
|
|
|
# Keep the core_setting_dir option to be backward compatible, suggest to use
|
|
# --custom_target
|
|
if args.core_setting_dir:
|
|
if not args.custom_target:
|
|
args.custom_target = args.core_setting_dir
|
|
else:
|
|
args.core_setting_dir = args.custom_target
|
|
|
|
if not args.custom_target:
|
|
if not args.testlist:
|
|
args.testlist = cwd + "/target/" + args.target + "/testlist.yaml"
|
|
if args.simulator == "pyflow":
|
|
args.core_setting_dir = cwd + "/pygen/pygen_src/target/" + args.target
|
|
else:
|
|
args.core_setting_dir = cwd + "/target/" + args.target
|
|
if args.target == "rv32imc":
|
|
args.mabi = "ilp32"
|
|
args.isa = "rv32imc"
|
|
elif args.target == "rv32imafdc":
|
|
args.mabi = "ilp32"
|
|
args.isa = "rv32imafdc"
|
|
elif args.target == "rv32imc_sv32":
|
|
args.mabi = "ilp32"
|
|
args.isa = "rv32imc"
|
|
elif args.target == "multi_harts":
|
|
args.mabi = "ilp32"
|
|
args.isa = "rv32gc"
|
|
elif args.target == "rv32imcb":
|
|
args.mabi = "ilp32"
|
|
args.isa = "rv32imcb"
|
|
elif args.target == "rv32i":
|
|
args.mabi = "ilp32"
|
|
args.isa = "rv32i"
|
|
elif args.target == "rv64imc":
|
|
args.mabi = "lp64"
|
|
args.isa = "rv64imc"
|
|
elif args.target == "rv64imcb":
|
|
args.mabi = "lp64"
|
|
args.isa = "rv64imcb"
|
|
elif args.target == "rv64gc":
|
|
args.mabi = "lp64"
|
|
args.isa = "rv64gc"
|
|
elif args.target == "rv64gcv":
|
|
args.mabi = "lp64"
|
|
args.isa = "rv64gcv"
|
|
elif args.target == "ml":
|
|
args.mabi = "lp64"
|
|
args.isa = "rv64imc"
|
|
elif args.target == "rv64imafdc":
|
|
args.mabi = "lp64"
|
|
args.isa = "rv64imafdc"
|
|
else:
|
|
sys.exit("Unsupported pre-defined target: {}".format(args.target))
|
|
else:
|
|
if re.match(".*gcc_compile.*", args.steps) or re.match(".*iss_sim.*",
|
|
args.steps):
|
|
if (not args.mabi) or (not args.isa):
|
|
sys.exit(
|
|
"mabi and isa must be specified for custom target {}".format(
|
|
args.custom_target))
|
|
if not args.testlist:
|
|
args.testlist = args.custom_target + "/testlist.yaml"
|
|
|
|
|
|
def main():
|
|
"""This is the main entry point."""
|
|
try:
|
|
cwd = os.path.dirname(os.path.realpath(__file__))
|
|
os.environ["RISCV_DV_ROOT"] = cwd
|
|
|
|
args = parse_args(cwd)
|
|
setup_logging(args.verbose)
|
|
|
|
# Create output directory
|
|
output_dir = create_output(args.o, args.noclean)
|
|
|
|
if args.verilog_style_check:
|
|
logging.debug("Run style check")
|
|
style_err = run_cmd("verilog_style/run.sh")
|
|
if style_err: logging.info(
|
|
"Found style error: \nERROR: " + style_err)
|
|
|
|
# Run any handcoded/directed assembly tests specified by args.asm_test
|
|
if args.asm_test != "":
|
|
asm_test = args.asm_test.split(',')
|
|
for path_asm_test in asm_test:
|
|
full_path = os.path.expanduser(path_asm_test)
|
|
# path_asm_test is a directory
|
|
if os.path.isdir(full_path):
|
|
run_assembly_from_dir(full_path, args.iss_yaml, args.isa,
|
|
args.mabi,
|
|
args.gcc_opts, args.iss, output_dir,
|
|
args.core_setting_dir, args.debug)
|
|
# path_asm_test is an assembly file
|
|
elif os.path.isfile(full_path) or args.debug:
|
|
run_assembly(full_path, args.iss_yaml, args.isa, args.mabi,
|
|
args.gcc_opts,
|
|
args.iss, output_dir, args.core_setting_dir,
|
|
args.debug)
|
|
else:
|
|
logging.error('{} does not exist'.format(full_path))
|
|
sys.exit(RET_FAIL)
|
|
return
|
|
|
|
# Run any handcoded/directed c tests specified by args.c_test
|
|
if args.c_test != "":
|
|
c_test = args.c_test.split(',')
|
|
for path_c_test in c_test:
|
|
full_path = os.path.expanduser(path_c_test)
|
|
# path_c_test is a directory
|
|
if os.path.isdir(full_path):
|
|
run_c_from_dir(full_path, args.iss_yaml, args.isa,
|
|
args.mabi,
|
|
args.gcc_opts, args.iss, output_dir,
|
|
args.core_setting_dir, args.debug)
|
|
# path_c_test is a c file
|
|
elif os.path.isfile(full_path) or args.debug:
|
|
run_c(full_path, args.iss_yaml, args.isa, args.mabi,
|
|
args.gcc_opts,
|
|
args.iss, output_dir, args.core_setting_dir,
|
|
args.debug)
|
|
else:
|
|
logging.error('{} does not exist'.format(full_path))
|
|
sys.exit(RET_FAIL)
|
|
return
|
|
|
|
run_cmd_output(["mkdir", "-p", ("{}/asm_test".format(output_dir))])
|
|
# Process regression test list
|
|
matched_list = []
|
|
# Any tests in the YAML test list that specify a directed assembly test
|
|
asm_directed_list = []
|
|
# Any tests in the YAML test list that specify a directed c test
|
|
c_directed_list = []
|
|
|
|
if not args.co:
|
|
process_regression_list(args.testlist, args.test, args.iterations,
|
|
matched_list, cwd)
|
|
for t in list(matched_list):
|
|
# Check mutual exclusive between gen_test, asm_test, and c_test
|
|
if 'asm_test' in t:
|
|
if 'gen_test' in t or 'c_test' in t:
|
|
logging.error(
|
|
'asm_test must not be defined in the testlist '
|
|
'together with the gen_test or c_test field')
|
|
sys.exit(RET_FATAL)
|
|
asm_directed_list.append(t)
|
|
matched_list.remove(t)
|
|
|
|
if 'c_test' in t:
|
|
if 'gen_test' in t or 'asm_test' in t:
|
|
logging.error(
|
|
'c_test must not be defined in the testlist '
|
|
'together with the gen_test or asm_test field')
|
|
sys.exit(RET_FATAL)
|
|
c_directed_list.append(t)
|
|
matched_list.remove(t)
|
|
|
|
if len(matched_list) == 0 and len(asm_directed_list) == 0 and len(
|
|
c_directed_list) == 0:
|
|
sys.exit("Cannot find {} in {}".format(args.test, args.testlist))
|
|
|
|
# Run instruction generator
|
|
if args.steps == "all" or re.match(".*gen.*", args.steps):
|
|
# Run any handcoded/directed assembly tests specified in YAML format
|
|
if len(asm_directed_list) != 0:
|
|
for test_entry in asm_directed_list:
|
|
gcc_opts = args.gcc_opts
|
|
gcc_opts += test_entry.get('gcc_opts', '')
|
|
path_asm_test = os.path.expanduser(
|
|
test_entry.get('asm_test'))
|
|
if path_asm_test:
|
|
# path_asm_test is a directory
|
|
if os.path.isdir(path_asm_test):
|
|
run_assembly_from_dir(path_asm_test, args.iss_yaml,
|
|
args.isa, args.mabi,
|
|
gcc_opts, args.iss,
|
|
output_dir,
|
|
args.core_setting_dir,
|
|
args.debug)
|
|
# path_asm_test is an assembly file
|
|
elif os.path.isfile(path_asm_test):
|
|
run_assembly(path_asm_test, args.iss_yaml, args.isa,
|
|
args.mabi, gcc_opts,
|
|
args.iss, output_dir,
|
|
args.core_setting_dir, args.debug)
|
|
else:
|
|
if not args.debug:
|
|
logging.error(
|
|
'{} does not exist'.format(path_asm_test))
|
|
sys.exit(RET_FAIL)
|
|
|
|
# Run any handcoded/directed C tests specified in YAML format
|
|
if len(c_directed_list) != 0:
|
|
for test_entry in c_directed_list:
|
|
gcc_opts = args.gcc_opts
|
|
gcc_opts += test_entry.get('gcc_opts', '')
|
|
path_c_test = os.path.expanduser(test_entry.get('c_test'))
|
|
if path_c_test:
|
|
# path_c_test is a directory
|
|
if os.path.isdir(path_c_test):
|
|
run_c_from_dir(path_c_test, args.iss_yaml, args.isa,
|
|
args.mabi,
|
|
gcc_opts, args.iss, output_dir,
|
|
args.core_setting_dir, args.debug)
|
|
# path_c_test is a C file
|
|
elif os.path.isfile(path_c_test):
|
|
run_c(path_c_test, args.iss_yaml, args.isa,
|
|
args.mabi, gcc_opts,
|
|
args.iss, output_dir, args.core_setting_dir,
|
|
args.debug)
|
|
else:
|
|
if not args.debug:
|
|
logging.error('{} does not exist'.format(path_c_test))
|
|
sys.exit(RET_FAIL)
|
|
|
|
# Run remaining tests using the instruction generator
|
|
gen(matched_list, args, output_dir, cwd)
|
|
|
|
if not args.co:
|
|
# Compile the assembly program to ELF, convert to plain binary
|
|
if args.steps == "all" or re.match(".*gcc_compile.*", args.steps):
|
|
gcc_compile(matched_list, output_dir, args.isa, args.mabi,
|
|
args.gcc_opts, args.debug)
|
|
|
|
# Run ISS simulation
|
|
if args.steps == "all" or re.match(".*iss_sim.*", args.steps):
|
|
iss_sim(matched_list, output_dir, args.iss, args.iss_yaml,
|
|
args.iss_opts,
|
|
args.isa, args.core_setting_dir, args.iss_timeout,
|
|
args.debug)
|
|
|
|
# Compare ISS simulation result
|
|
if args.steps == "all" or re.match(".*iss_cmp.*", args.steps):
|
|
iss_cmp(matched_list, args.iss, output_dir,
|
|
args.stop_on_first_error,
|
|
args.exp, args.debug)
|
|
|
|
sys.exit(RET_SUCCESS)
|
|
except KeyboardInterrupt:
|
|
logging.info("\nExited Ctrl-C from user request.")
|
|
sys.exit(130)
|
|
|
|
|
|
if __name__ == "__main__":
|
|
main()
|