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16 lines
592 B
Systemverilog
16 lines
592 B
Systemverilog
// Copyright lowRISC contributors.
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// Licensed under the Apache License, Version 2.0, see LICENSE for details.
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// SPDX-License-Identifier: Apache-2.0
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// A fragment of SystemVerilog code that is inserted into the ICache. We're using this to emulate
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// missing bind support, so this file should do nothing but instantiate a module.
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//
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// Using a wildcard (.*) for ports allows the testbench to inspect internal signals of the cache.
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formal_tb #(
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.BranchPredictor (BranchPredictor),
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.ICacheECC (ICacheECC),
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.BranchCache (BranchCache),
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.NUM_FB (NUM_FB)
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) tb_i (.*);
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